From: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Date: Tue, 11 Jun 2013 01:00:40 +0000 (+1000)
Subject: intc/xilinx_intc: Dont lower IRQ when HIE cleared
X-Git-Tag: qemu-xen-4.4.0-rc1~6^2~276
X-Git-Url: http://xenbits.xensource.com/gitweb?a=commitdiff_plain;h=afd59989db90683fa127fec501d2633bcfbd6379;p=qemu-upstream-4.4-testing.git

intc/xilinx_intc: Dont lower IRQ when HIE cleared

This is a little strange. It is lowering the parent IRQ pin on input
when HIE is cleared. There is no such behaviour in the real hardware.

ISR changes based on interrupt pin state are already guarded on HIE
being set. So we can just delete this if in its entirety.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
---

diff --git a/hw/intc/xilinx_intc.c b/hw/intc/xilinx_intc.c
index ddedfa379..297f53759 100644
--- a/hw/intc/xilinx_intc.c
+++ b/hw/intc/xilinx_intc.c
@@ -143,11 +143,6 @@ static void irq_handler(void *opaque, int irq, int level)
 {
     struct xlx_pic *p = opaque;
 
-    if (!(p->regs[R_MER] & 2)) {
-        qemu_irq_lower(p->parent_irq);
-        return;
-    }
-
     /* edge triggered interrupt */
     if (p->c_kind_of_intr & (1 << irq) && p->regs[R_MER] & 2) {
         p->regs[R_ISR] |= (level << irq);