From: Jan Beulich <jbeulich@suse.com>
Date: Tue, 21 Apr 2020 08:51:42 +0000 (+0200)
Subject: x86emul: SYSRET must change CPL
X-Git-Url: http://xenbits.xensource.com/gitweb?a=commitdiff_plain;h=a94b55a2986145ab5b357feb340f782d9d199d10;p=people%2Fdariof%2Fxen.git

x86emul: SYSRET must change CPL

The special AMD behavior of leaving SS mostly alone wasn't really
complete: We need to adjust CPL aka SS.DPL.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
---

diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c
index 3ed64c13ea..1959fc227a 100644
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -6022,6 +6022,8 @@ x86_emulate(
 
             /* There's explicitly no RPL adjustment here. */
             sreg.sel = (msr_val >> 48) + 8;
+            /* But DPL needs adjustment, for the new CPL to be correct. */
+            sreg.dpl = 3;
         }
 
 #ifdef __x86_64__