From: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Date: Mon, 3 Jun 2013 16:17:44 +0000 (+0100)
Subject: xilinx_spips: lqspi: Push more data to tx-fifo
X-Git-Tag: qemu-xen-4.4.0-rc1~6^2~334^2~10
X-Git-Url: http://xenbits.xensource.com/gitweb?a=commitdiff_plain;h=a66418f6f181ca6ee04e77896674253ff83db45e;p=qemu-upstream-4.5-testing.git

xilinx_spips: lqspi: Push more data to tx-fifo

Do 16 words per fifo flush. Increases performance and decreases
debug verbosity. This data depth has no real hardware analogue,
so just go with something that has reasonable performance.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Message-id: 5621ee4621941d3639b5cacfdec26bd3148f31d5.1369117359.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---

diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c
index 665f471bb..e975a876c 100644
--- a/hw/ssi/xilinx_spips.c
+++ b/hw/ssi/xilinx_spips.c
@@ -608,11 +608,14 @@ lqspi_read(void *opaque, hwaddr addr, unsigned int size)
 
         DB_PRINT_L(0, "starting QSPI data read\n");
 
-        for (i = 0; i < LQSPI_CACHE_SIZE / 4; ++i) {
-            tx_data_bytes(s, 0, 4);
+        while (cache_entry < LQSPI_CACHE_SIZE / 4) {
+            for (i = 0; i < 16; ++i) {
+                tx_data_bytes(s, 0, 4);
+            }
             xilinx_spips_flush_txfifo(s);
-            rx_data_bytes(s, &q->lqspi_buf[cache_entry], 4);
-            cache_entry++;
+            for (i = 0; i < 16; ++i) {
+                rx_data_bytes(s, &q->lqspi_buf[cache_entry++], 4);
+            }
         }
 
         s->regs[R_LQSPI_STS] &= ~LQSPI_CFG_U_PAGE;