From: Sven Schnelle <svens@stackframe.org>
Date: Tue, 12 Jun 2012 07:20:23 +0000 (+0200)
Subject: EHCI: Add support for 64 bit capability
X-Git-Tag: rel-1.7.1~27
X-Git-Url: http://xenbits.xensource.com/gitweb?a=commitdiff_plain;h=a3fa66cdae4ccf46faed664668b2a953cbbbf0c8;p=seabios.git

EHCI: Add support for 64 bit capability

Signed-off-by: Sven Schnelle <svens@stackframe.org>
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
---

diff --git a/src/usb-ehci.c b/src/usb-ehci.c
index 4cb3e6a..3c0be13 100644
--- a/src/usb-ehci.c
+++ b/src/usb-ehci.c
@@ -334,10 +334,6 @@ ehci_init(struct pci_device *pci, int busid, struct pci_device *comppci)
     u32 baseaddr = pci_config_readl(bdf, PCI_BASE_ADDRESS_0);
     struct ehci_caps *caps = (void*)(baseaddr & PCI_BASE_ADDRESS_MEM_MASK);
     u32 hcc_params = readl(&caps->hccparams);
-    if (hcc_params & HCC_64BIT_ADDR) {
-        dprintf(1, "No support for 64bit EHCI\n");
-        return -1;
-    }
 
     struct usb_ehci_s *cntl = malloc_tmphigh(sizeof(*cntl));
     if (!cntl) {
@@ -349,6 +345,8 @@ ehci_init(struct pci_device *pci, int busid, struct pci_device *comppci)
     cntl->usb.pci = pci;
     cntl->usb.type = USB_TYPE_EHCI;
     cntl->caps = caps;
+    if (hcc_params & HCC_64BIT_ADDR)
+        cntl->regs->ctrldssegment = 0;
     cntl->regs = (void*)caps + readb(&caps->caplength);
 
     dprintf(1, "EHCI init on dev %02x:%02x.%x (regs=%p)\n"
diff --git a/src/usb-ehci.h b/src/usb-ehci.h
index b295c78..32e4109 100644
--- a/src/usb-ehci.h
+++ b/src/usb-ehci.h
@@ -90,7 +90,7 @@ struct ehci_regs {
 #define PORT_RWC_BITS   (PORT_CSC | PORT_PEC | PORT_OCC)
 
 
-#define EHCI_QH_ALIGN 64 // Can't span a 4K boundary, so increase to 64
+#define EHCI_QH_ALIGN 128 // Can't span a 4K boundary, so increase from 32
 
 struct ehci_qh {
     u32 next;
@@ -102,7 +102,7 @@ struct ehci_qh {
     u32 alt_next;
     u32 token;
     u32 buf[5];
-    // u32 buf_hi[5];
+    u32 buf_hi[5];
 } PACKED;
 
 #define QH_CONTROL       (1 << 27)
@@ -133,15 +133,18 @@ struct ehci_qh {
 #define EHCI_PTR_QH             0x0002
 
 
-#define EHCI_QTD_ALIGN 32
+#define EHCI_QTD_ALIGN 64 // Can't span a 4K boundary, so increase from 32
 
 struct ehci_qtd {
     u32 qtd_next;
     u32 alt_next;
     u32 token;
     u32 buf[5];
-    //u32 buf_hi[5];
-} PACKED;
+    u32 buf_hi[5];
+    /* keep struct size a multiple of 64 bytes, as we're allocating
+       arrays. Without this padding, the second qtd could have the
+       wrong alignment. */
+} PACKED __aligned(EHCI_QTD_ALIGN);
 
 #define QTD_TOGGLE      (1 << 31)
 #define QTD_LENGTH_SHIFT 16