From: Mattias Holm <holm@liacs.nl>
Date: Wed, 8 Dec 2010 11:15:17 +0000 (+0200)
Subject: target-arm: correct cp15 c1_sys reset value for cortex-a8
X-Git-Url: http://xenbits.xensource.com/gitweb?a=commitdiff_plain;h=9c486ad6e4e4afcd582460b4c70b1e2be856dbfd;p=qemu-xen-4.1-testing.git

target-arm: correct cp15 c1_sys reset value for cortex-a8

Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---

diff --git a/target-arm/helper.c b/target-arm/helper.c
index 409a6c00a..e54fb27a8 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -109,6 +109,7 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
         env->cp15.c0_ccsid[0] = 0xe007e01a; /* 16k L1 dcache. */
         env->cp15.c0_ccsid[1] = 0x2007e01a; /* 16k L1 icache. */
         env->cp15.c0_ccsid[2] = 0xf0000000; /* No L2 icache. */
+        env->cp15.c1_sys = 0x00c50078;
         break;
     case ARM_CPUID_CORTEXA9:
         set_feature(env, ARM_FEATURE_V6);