From: Julien Grall Date: Mon, 5 Dec 2016 17:43:23 +0000 (+0000) Subject: xen/arm: traps: Emulate ICC_SRE_EL1 as RAZ/WI X-Git-Tag: RELEASE-4.7.3~87 X-Git-Url: http://xenbits.xensource.com/gitweb?a=commitdiff_plain;h=9a54dcdca3ef6c7dca52738759c10176ee67e263;p=xen.git xen/arm: traps: Emulate ICC_SRE_EL1 as RAZ/WI Recent Linux kernel (4.4 and onwards [1]) is checking whether it is possible to enable sysreg access (ICC_SRE_EL1.SRE) when the ID register (ID_AA64PRF0_EL1.GIC) is reporting the presence of the sysreg interface. When the guest has been configured to use GICv2, the hypervisor will disable sysreg access for this vm (via ICC_SRE_EL2.Enable) and therefore access to system register such as ICC_SRE_EL1 are trapped in EL2. However, ICC_SRE_EL1 is not emulated by the hypervisor. This means that Linux will crash as soon as it is trying to access ICC_SRE_EL1. To solve this problem, Xen can implement ICC_SRE_EL1 as read-as-zero write-ignore. The emulation will only be used when sysreg are disabled for EL1. [1] 963fcd409 "arm64: cpufeatures: Check ICC_EL1_SRE.SRE before enabling ARM64_HAS_SYSREG_GIC_CPUIF" Signed-off-by: Julien Grall Reviewed-by: Stefano Stabellini --- diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c index 77393d4df1..5af964f14d 100644 --- a/xen/arch/arm/traps.c +++ b/xen/arch/arm/traps.c @@ -2289,6 +2289,20 @@ static void do_sysreg(struct cpu_user_regs *regs, "Emulation of sysreg ICC_SGI0R_EL1/ASGI1R_EL1 not supported\n"); return inject_undef64_exception(regs, hsr.len); + /* + * ICC_SRE_EL2.Enable = 0 + * + * GIC Architecture Specification (IHI 0069C): Section 8.1.9 + */ + case HSR_SYSREG_ICC_SRE_EL1: + /* + * Trapped when the guest is using GICv2 whilst the platform + * interrupt controller is GICv3. In this case, the register + * should be emulate as RAZ/WI to tell the guest to use the GIC + * memory mapped interface (i.e GICv2 compatibility). + */ + return handle_raz_wi(regs, regidx, hsr.sysreg.read, hsr, 1); + /* * HCR_EL2.TIDCP * diff --git a/xen/include/asm-arm/sysregs.h b/xen/include/asm-arm/sysregs.h index 570f43eda4..887368e248 100644 --- a/xen/include/asm-arm/sysregs.h +++ b/xen/include/asm-arm/sysregs.h @@ -90,6 +90,7 @@ #define HSR_SYSREG_ICC_SGI1R_EL1 HSR_SYSREG(3,0,c12,c11,5) #define HSR_SYSREG_ICC_ASGI1R_EL1 HSR_SYSREG(3,1,c12,c11,6) #define HSR_SYSREG_ICC_SGI0R_EL1 HSR_SYSREG(3,2,c12,c11,7) +#define HSR_SYSREG_ICC_SRE_EL1 HSR_SYSREG(3,0,c12,c12,5) #define HSR_SYSREG_CONTEXTIDR_EL1 HSR_SYSREG(3,0,c13,c0,1) #define HSR_SYSREG_PMCR_EL0 HSR_SYSREG(3,3,c9,c12,0)