From: Atish Patra Date: Sat, 3 Aug 2019 04:27:23 +0000 (-0700) Subject: dt-bindings: Update the riscv,isa string description X-Git-Tag: v5.4.17~2921^2~4 X-Git-Url: http://xenbits.xensource.com/gitweb?a=commitdiff_plain;h=94ed3fde38c7c1347cd82b945553905cfd992ab9;p=people%2Faperard%2Flinux.git dt-bindings: Update the riscv,isa string description Since the RISC-V specification states that ISA description strings are case-insensitive, there's no functional difference between mixed-case, upper-case, and lower-case ISA strings. Thus, to simplify parsing, specify that the letters present in "riscv,isa" must be all lowercase. Suggested-by: Paul Walmsley Signed-off-by: Atish Patra Signed-off-by: Paul Walmsley --- diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml index c899111aa5e37..9d3fe6aada2b9 100644 --- a/Documentation/devicetree/bindings/riscv/cpus.yaml +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml @@ -50,6 +50,10 @@ properties: User-Level ISA document, available from https://riscv.org/specifications/ + While the isa strings in ISA specification are case + insensitive, letters in the riscv,isa string must be all + lowercase to simplify parsing. + timebase-frequency: type: integer minimum: 1