From: George Dunlap Date: Thu, 7 Apr 2011 14:41:05 +0000 (+0100) Subject: x86/hvm: load CPU structures from xen versions <=3.4 X-Git-Tag: 4.0.2-rc3~3 X-Git-Url: http://xenbits.xensource.com/gitweb?a=commitdiff_plain;h=8ae2f89a23ce6e56fef192f78e31b64bffb77d5c;p=people%2Fvhanquez%2Fxen.git x86/hvm: load CPU structures from xen versions <=3.4 Xen 4.0 added "msr_tsc_aux" in the middle of the hvm_hw_cpu structure, making it incompatible with pre-3.4 savefiles. This patch uses the recently introduced backwards-compatibility infrastructure to convert the old to the new. Signed-off-by: George Dunlap Acked-by: Tim Deegan Committed-by: Tim Deegan xen-unstable changeset: 23172:dc8b05d22a59 xen-unstable date: Wed Apr 06 11:40:54 2011 +0100 --- diff --git a/xen/include/public/arch-x86/hvm/save.h b/xen/include/public/arch-x86/hvm/save.h index 5996cbc8f..73af430a6 100644 --- a/xen/include/public/arch-x86/hvm/save.h +++ b/xen/include/public/arch-x86/hvm/save.h @@ -46,6 +46,8 @@ DECLARE_HVM_SAVE_TYPE(HEADER, 1, struct hvm_save_header); /* * Processor + * + * Compat: Pre-3.4 didn't have msr_tsc_aux */ struct hvm_hw_cpu { @@ -157,8 +159,131 @@ struct hvm_hw_cpu { uint32_t error_code; }; -DECLARE_HVM_SAVE_TYPE(CPU, 2, struct hvm_hw_cpu); +struct hvm_hw_cpu_compat { + uint8_t fpu_regs[512]; + + uint64_t rax; + uint64_t rbx; + uint64_t rcx; + uint64_t rdx; + uint64_t rbp; + uint64_t rsi; + uint64_t rdi; + uint64_t rsp; + uint64_t r8; + uint64_t r9; + uint64_t r10; + uint64_t r11; + uint64_t r12; + uint64_t r13; + uint64_t r14; + uint64_t r15; + + uint64_t rip; + uint64_t rflags; + + uint64_t cr0; + uint64_t cr2; + uint64_t cr3; + uint64_t cr4; + + uint64_t dr0; + uint64_t dr1; + uint64_t dr2; + uint64_t dr3; + uint64_t dr6; + uint64_t dr7; + + uint32_t cs_sel; + uint32_t ds_sel; + uint32_t es_sel; + uint32_t fs_sel; + uint32_t gs_sel; + uint32_t ss_sel; + uint32_t tr_sel; + uint32_t ldtr_sel; + + uint32_t cs_limit; + uint32_t ds_limit; + uint32_t es_limit; + uint32_t fs_limit; + uint32_t gs_limit; + uint32_t ss_limit; + uint32_t tr_limit; + uint32_t ldtr_limit; + uint32_t idtr_limit; + uint32_t gdtr_limit; + + uint64_t cs_base; + uint64_t ds_base; + uint64_t es_base; + uint64_t fs_base; + uint64_t gs_base; + uint64_t ss_base; + uint64_t tr_base; + uint64_t ldtr_base; + uint64_t idtr_base; + uint64_t gdtr_base; + + uint32_t cs_arbytes; + uint32_t ds_arbytes; + uint32_t es_arbytes; + uint32_t fs_arbytes; + uint32_t gs_arbytes; + uint32_t ss_arbytes; + uint32_t tr_arbytes; + uint32_t ldtr_arbytes; + + uint64_t sysenter_cs; + uint64_t sysenter_esp; + uint64_t sysenter_eip; + + /* msr for em64t */ + uint64_t shadow_gs; + + /* msr content saved/restored. */ + uint64_t msr_flags; + uint64_t msr_lstar; + uint64_t msr_star; + uint64_t msr_cstar; + uint64_t msr_syscall_mask; + uint64_t msr_efer; + /*uint64_t msr_tsc_aux; COMPAT */ + + /* guest's idea of what rdtsc() would return */ + uint64_t tsc; + + /* pending event, if any */ + union { + uint32_t pending_event; + struct { + uint8_t pending_vector:8; + uint8_t pending_type:3; + uint8_t pending_error_valid:1; + uint32_t pending_reserved:19; + uint8_t pending_valid:1; + }; + }; + /* error code for pending event */ + uint32_t error_code; +}; + +static inline int _hvm_hw_fix_cpu(void *h) { + struct hvm_hw_cpu *new=h; + struct hvm_hw_cpu_compat *old=h; + + /* If we copy from the end backwards, we should + * be able to do the modification in-place */ + new->error_code=old->error_code; + new->pending_event=old->pending_event; + new->tsc=old->tsc; + new->msr_tsc_aux=0; + + return 0; +} +DECLARE_HVM_SAVE_TYPE_COMPAT(CPU, 2, struct hvm_hw_cpu, \ + struct hvm_hw_cpu_compat, _hvm_hw_fix_cpu); /* * PIC