From: kib <kib@FreeBSD.org>
Date: Fri, 23 Oct 2015 11:43:56 +0000 (+0000)
Subject: Decode new values for CPUID leaf 2 cache and TLB descriptors, from the
X-Git-Url: http://xenbits.xensource.com/gitweb?a=commitdiff_plain;h=89907eb85ed4dd71ebc419a28a2bbff1690445da;p=people%2Fliuw%2Ffreebsd.git

Decode new values for CPUID leaf 2 cache and TLB descriptors, from the
Intel SDM revision 56.

Sponsored by:	The FreeBSD Foundation
MFC after:	1 week
---

diff --git a/sys/x86/x86/identcpu.c b/sys/x86/x86/identcpu.c
index 4fe3e3cbe99..2f6cfbcdfb6 100644
--- a/sys/x86/x86/identcpu.c
+++ b/sys/x86/x86/identcpu.c
@@ -1883,6 +1883,18 @@ print_INTEL_TLB(u_int data)
 	case 0x68:
 		printf("1st-level data cache: 32 KB, 4 way set associative, sectored cache, 64 byte line size\n");
 		break;
+	case 0x6a:
+		printf("uTLB: 4KByte pages, 8-way set associative, 64 entries\n");
+		break;
+	case 0x6b:
+		printf("DTLB: 4KByte pages, 8-way set associative, 256 entries\n");
+		break;
+	case 0x6c:
+		printf("DTLB: 2M/4M pages, 8-way set associative, 126 entries\n");
+		break;
+	case 0x6d:
+		printf("DTLB: 1 GByte pages, fully associative, 16 entries\n");
+		break;
 	case 0x70:
 		printf("Trace cache: 12K-uops, 8-way set associative\n");
 		break;