From: Andrew Cooper Date: Thu, 17 Mar 2016 12:49:40 +0000 (+0100) Subject: x86: don't hold TRAPBOUNCE_flags in %cl during create_bounce_frame X-Git-Tag: 4.7.0-rc1~363 X-Git-Url: http://xenbits.xensource.com/gitweb?a=commitdiff_plain;h=8738c76f0e468155b08fa0a101304837dd481285;p=xen.git x86: don't hold TRAPBOUNCE_flags in %cl during create_bounce_frame TRAPBOUNCE_flags are always available via a displacement from %rdx. This allows all of %rcx to be used as a scratch register. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- diff --git a/xen/arch/x86/x86_64/compat/entry.S b/xen/arch/x86/x86_64/compat/entry.S index 5218f8aed7..33e2c12db4 100644 --- a/xen/arch/x86/x86_64/compat/entry.S +++ b/xen/arch/x86/x86_64/compat/entry.S @@ -263,11 +263,10 @@ compat_create_bounce_frame: movl UREGS_rsp+8(%rsp),%esi .Lft4: mov UREGS_ss+8(%rsp),%fs 2: - movb TRAPBOUNCE_flags(%rdx),%cl subl $3*4,%esi movq VCPU_vcpu_info(%rbx),%rax pushq COMPAT_VCPUINFO_upcall_mask(%rax) - testb $TBF_INTERRUPT,%cl + testb $TBF_INTERRUPT,TRAPBOUNCE_flags(%rdx) setnz %ch # TBF_INTERRUPT -> set upcall mask orb %ch,COMPAT_VCPUINFO_upcall_mask(%rax) popq %rax @@ -284,7 +283,7 @@ compat_create_bounce_frame: .Lft6: movl %eax,%fs:2*4(%rsi) # EFLAGS movl UREGS_rip+8(%rsp),%eax .Lft7: movl %eax,%fs:(%rsi) # EIP - testb $TBF_EXCEPTION_ERRCODE,%cl + testb $TBF_EXCEPTION_ERRCODE,TRAPBOUNCE_flags(%rdx) jz 1f subl $4,%esi movl TRAPBOUNCE_error_code(%rdx),%eax diff --git a/xen/arch/x86/x86_64/entry.S b/xen/arch/x86/x86_64/entry.S index cab976313e..07ef096bde 100644 --- a/xen/arch/x86/x86_64/entry.S +++ b/xen/arch/x86/x86_64/entry.S @@ -343,7 +343,6 @@ UNLIKELY_START(g, create_bounce_frame_bad_sp) lea UNLIKELY_DISPATCH_LABEL(create_bounce_frame_bad_sp)(%rip), %rdi jmp asm_domain_crash_synchronous /* Does not return */ __UNLIKELY_END(create_bounce_frame_bad_sp) - movb TRAPBOUNCE_flags(%rdx),%cl subq $40,%rsi movq UREGS_ss+8(%rsp),%rax ASM_STAC @@ -352,7 +351,7 @@ __UNLIKELY_END(create_bounce_frame_bad_sp) .Lft3: movq %rax,24(%rsi) # RSP movq VCPU_vcpu_info(%rbx),%rax pushq VCPUINFO_upcall_mask(%rax) - testb $TBF_INTERRUPT,%cl + testb $TBF_INTERRUPT,TRAPBOUNCE_flags(%rdx) setnz %ch # TBF_INTERRUPT -> set upcall mask orb %ch,VCPUINFO_upcall_mask(%rax) popq %rax @@ -369,7 +368,7 @@ __UNLIKELY_END(create_bounce_frame_bad_sp) .Lft5: movq %rax,16(%rsi) # RFLAGS movq UREGS_rip+8(%rsp),%rax .Lft6: movq %rax,(%rsi) # RIP - testb $TBF_EXCEPTION_ERRCODE,%cl + testb $TBF_EXCEPTION_ERRCODE,TRAPBOUNCE_flags(%rdx) jz 1f subq $8,%rsi movl TRAPBOUNCE_error_code(%rdx),%eax