From: Ross Philipson <ross.philipson@citrix.com>
Date: Sat, 28 Mar 2009 17:03:30 +0000 (-0400)
Subject: FLR - intermediate checkin 10 3/28 - use vendor, device, class fields
X-Git-Url: http://xenbits.xensource.com/gitweb?a=commitdiff_plain;h=7d0dbde015639963f9e3b02494ef798c97f8f74d;p=xenclient%2Fkernel.git

FLR - intermediate checkin 10 3/28 - use vendor, device, class fields
in pci dev struct.

 Changes to be committed:
	modified:   drivers/xen/pciback/pciback_ops.c
---

diff --git a/drivers/xen/pciback/pciback_ops.c b/drivers/xen/pciback/pciback_ops.c
index 1c74b0b1..b9b5492e 100644
--- a/drivers/xen/pciback/pciback_ops.c
+++ b/drivers/xen/pciback/pciback_ops.c
@@ -57,7 +57,7 @@ void pciback_reload_config_space(struct pci_dev *dev)
  */
 void pciback_reset_device(struct pci_dev *dev)
 {
-	u16 cmd;
+	u16 cmd = 0;
 
 	/* Disable devices (but not bridges) */
 	if (dev->hdr_type == PCI_HEADER_TYPE_NORMAL) {
@@ -83,7 +83,7 @@ void pciback_reset_device(struct pci_dev *dev)
  */
 static void pciback_do_pcie_flr(struct pci_dev *dev, int exp_pos)
 {
-	u16 status;
+	u16 status = 0;
 	
 	dev_dbg(&dev->dev, "doing PCIe FLR\n");	
 
@@ -114,7 +114,7 @@ static void pciback_do_pcie_flr(struct pci_dev *dev, int exp_pos)
  */
 static void pciback_do_pci_flr(struct pci_dev *dev, int af_pos)
 {
-	u8 status;
+	u8 status = 0;
 
 	dev_dbg(&dev->dev, "doing PCI FLR\n");
 
@@ -150,18 +150,16 @@ static int pciback_do_vendor_specific_reset(struct pci_dev *dev)
 {
 	struct pci_dev *gmch;
 	int vendor_pos, i;
-	u32 reg32;
-	u16 vendor_id, device_id, class_id;	
-	u8 reg8;
+	u32 reg32 = 0;
+	u16 device_id;	
+	u8 reg8 = 0;
 
 	dev_dbg(&dev->dev, "doing vendor specific resets\n");	
 
-	pci_read_config_word(dev, PCI_VENDOR_ID, &vendor_id);
-	if (vendor_id != PCIBACK_VENDOR_INTEL)
+	if (dev->vendor != PCIBACK_VENDOR_INTEL)
 		return -ENXIO;
 
-	pci_read_config_word(dev, PCI_CLASS_DEVICE, &class_id);
-	if (class_id == PCIBACK_CLASS_ID_VGA) {
+	if ((dev->class >> 8) == PCIBACK_CLASS_ID_VGA) {
 		if (dev->bus->number != 0 || dev->devfn != PCI_DEVFN(2,0))
 			return -ENXIO;
 
@@ -170,7 +168,7 @@ static int pciback_do_vendor_specific_reset(struct pci_dev *dev)
 		if (!gmch)
 			return -ENXIO;
 
-		pci_read_config_word(gmch, PCI_DEVICE_ID, &device_id);
+		device_id = gmch->device;
 		pci_dev_put(gmch);
 
 		if (device_id != PCI_DEVICE_ID_INTEL_GMCHGM45)
@@ -184,7 +182,7 @@ static int pciback_do_vendor_specific_reset(struct pci_dev *dev)
 			return -ENXIO;
 
 		vendor_pos = PCIBACK_IGFX_CAP09_OFFSET;
-	} else if (class_id == PCIBACK_CLASS_ID_USB) {
+	} else if ((dev->class >> 8) == PCIBACK_CLASS_ID_USB) {
 		vendor_pos = pci_find_capability(dev, PCI_CAP_ID_VNDR);
 		if (vendor_pos == 0)
 			return -ENXIO;
@@ -192,7 +190,7 @@ static int pciback_do_vendor_specific_reset(struct pci_dev *dev)
 	else
 		return -ENXIO;	
 
-	if (class_id == PCIBACK_CLASS_ID_VGA) {
+	if ((dev->class >> 8) == PCIBACK_CLASS_ID_VGA) {
 		pci_write_config_byte(dev, PCIBACK_IGFX_MEDIARST_OFFSET, PCIBACK_IGFX_MEDIARST);
 		for (i = 0; i <= 10; i++) {
 			msleep(100);
@@ -228,7 +226,7 @@ out:
 static int pciback_do_dstate_transition_reset(struct pci_dev *dev)
 {
 	int pm_pos;
-	u32 pm_ctl;
+	u32 pm_ctl = 0;
 
 	pm_pos = pci_find_capability(dev, PCI_CAP_ID_PM);
 	if (pm_pos == 0)
@@ -271,11 +269,10 @@ static int pciback_do_dstate_transition_reset(struct pci_dev *dev)
 static int pciback_do_secondary_bus_reset(struct pci_dev *dev)
 {
 	struct pci_dev *bridge = dev->bus->self;
-	u16 pci_bctl;
+	u16 pci_bctl = 0;
 	struct pci_dev *dev_tmp;
 	struct pci_dev *dev_arr[8];
-	int i = 0;
-	int err = 0;
+	int i = 0, err = 0;
 
 	dev_dbg(&dev->dev, "doing PCIe secondary bus reset\n");	
 
@@ -410,7 +407,7 @@ void pciback_flr_device(struct pci_dev *dev)
 static int pciback_find_pcie_flr_caps(struct pci_dev *dev)
 {
 	int exp_pos;
-	u32 cap;
+	u32 cap = 0;
 
 	/* First look for the PCIe FLR capabilities using the capabilities list */
 	exp_pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
@@ -434,8 +431,8 @@ static int pciback_find_pci_flr_caps(struct pci_dev *dev)
 {
 	struct pci_dev *gmch;
 	int af_pos;
-	u16 vendor_id, device_id, class_id;
-	u8 cap, reg8;
+	u16 device_id;
+	u8 cap = 0, reg8 = 0;
 
 	/* First look for the PCI AF capabilities for FLR using the capabilities list. This
 	 * is only used on the devices on the root/host bus (integrated devices). 
@@ -456,13 +453,8 @@ static int pciback_find_pci_flr_caps(struct pci_dev *dev)
 	 * systems has special logic for locating the hidden FLR caps.
      */
 	do {
-		if (dev->bus->number != 0 || dev->devfn != PCI_DEVFN(2,0))
-			break;
-		pci_read_config_word(dev, PCI_VENDOR_ID, &vendor_id);
-		if (vendor_id != PCIBACK_VENDOR_INTEL)
-			break;
-		pci_read_config_word(dev, PCI_CLASS_DEVICE, &class_id);
-		if (class_id != PCIBACK_CLASS_ID_VGA)
+		if (dev->bus->number != 0 || dev->devfn != PCI_DEVFN(2,0) ||
+			dev->vendor != PCIBACK_VENDOR_INTEL || (dev->class >> 8) != PCIBACK_CLASS_ID_VGA)
 			break;
 
 		/* Locate the GMCH (north bridge) and test for specific Intel devices */
@@ -470,7 +462,7 @@ static int pciback_find_pci_flr_caps(struct pci_dev *dev)
 		if (!gmch)
 			break;
 
-		pci_read_config_word(gmch, PCI_DEVICE_ID, &device_id);
+		device_id = gmch->device;
 		pci_dev_put(gmch);
 
 		if (device_id != PCI_DEVICE_ID_INTEL_GMCHQ45 &&
@@ -499,21 +491,15 @@ static int pciback_find_pci_flr_caps(struct pci_dev *dev)
 void pciback_classify_device(struct pci_dev *dev)
 {
 	struct pciback_dev_data *dev_data;
-	int err = 0;
-	u16 dev_class, exp_caps;
 	int exp_pos;
+	u16 exp_caps = 0;
 
 	dev_data = pci_get_drvdata(dev);
 	dev_data->dev_type = PCIBACK_TYPE_UNKNOWN;
 
-	err = pci_read_config_word(dev, PCI_CLASS_DEVICE, &dev_class);
-	if (err) {
-		dev_warn(&dev->dev, "failed to read PCI class information!\n");
-		goto classify_done;
-	}	
 	exp_pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
 	
-	if (dev_class != DEV_CLASS_PCI_PCI_BRIDGE) {
+	if ((dev->class >> 8) != DEV_CLASS_PCI_PCI_BRIDGE) {
 		if (exp_pos != 0) {
 			dev_data->dev_type = PCIBACK_TYPE_PCIe_ENDPOINT;
 			dev_data->exp_flr_offset = pciback_find_pcie_flr_caps(dev);
@@ -529,11 +515,7 @@ void pciback_classify_device(struct pci_dev *dev)
 		goto classify_done;
 	}
 
-	err = pci_read_config_word(dev, exp_pos + PCI_EXP_FLAGS, &exp_caps);
-	if (err) {
-		dev_warn(&dev->dev, "failed to read PCI Express flags!\n");
-		goto classify_done;
-	}
+	pci_read_config_word(dev, exp_pos + PCI_EXP_FLAGS, &exp_caps);
 	dev_data->dev_type = ((PCI_EXP_FLAGS_TYPE >> 4) == PCI_EXP_TYPE_PCI_BRIDGE) ? PCIBACK_TYPE_PCI_BRIDGE : PCIBACK_TYPE_PCIe_BRIDGE;
 
 classify_done: