From: Jan Beulich <jbeulich@suse.com>
Date: Tue, 2 Jun 2015 15:43:08 +0000 (+0000)
Subject: xen/pt: correctly handle PM status bit
X-Git-Tag: qemu-xen-4.4.3-rc1~7
X-Git-Url: http://xenbits.xensource.com/gitweb?a=commitdiff_plain;h=7cfdbc68fc09e21b53981f2ad597eca2e66c94d9;p=qemu-upstream-4.4-testing.git

xen/pt: correctly handle PM status bit

xen_pt_pmcsr_reg_write() needs an adjustment to deal with the RW1C
nature of the not passed through bit 15 (PCI_PM_CTRL_PME_STATUS).

This is a preparatory patch for XSA-131.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
---

diff --git a/hw/xen/xen_pt_config_init.c b/hw/xen/xen_pt_config_init.c
index 80dd0187a..b57d5da6a 100644
--- a/hw/xen/xen_pt_config_init.c
+++ b/hw/xen/xen_pt_config_init.c
@@ -950,7 +950,8 @@ static int xen_pt_pmcsr_reg_write(XenPCIPassthroughState *s,
 
     /* create value for writing to I/O device register */
     throughable_mask = ~reg->emu_mask & valid_mask;
-    *val = XEN_PT_MERGE_VALUE(*val, dev_value, throughable_mask);
+    *val = XEN_PT_MERGE_VALUE(*val, dev_value & ~PCI_PM_CTRL_PME_STATUS,
+                              throughable_mask);
 
     return 0;
 }