From: Peter Maydell <peter.maydell@linaro.org>
Date: Sun, 13 Nov 2011 14:18:39 +0000 (+0000)
Subject: hw/pxa2xx.c: Fix handling of RW bits in PMCR
X-Git-Tag: qemu-xen-4.3.0-rc1~2005
X-Git-Url: http://xenbits.xensource.com/gitweb?a=commitdiff_plain;h=7c64d297f988f6ee2136f29fac010db2c8fc352c;p=qemu-upstream-4.3-testing.git

hw/pxa2xx.c: Fix handling of RW bits in PMCR

Fix an error in commit afd4a6522 which meant that writing a zero
to the RW bits in the PMCR wouldn't actually clear them. (Error
spotted by Andrzej Zaborowski.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
---

diff --git a/hw/pxa2xx.c b/hw/pxa2xx.c
index d38b92292..e9a507ece 100644
--- a/hw/pxa2xx.c
+++ b/hw/pxa2xx.c
@@ -117,6 +117,7 @@ static void pxa2xx_pm_write(void *opaque, target_phys_addr_t addr,
         /* Clear the write-one-to-clear bits... */
         s->pm_regs[addr >> 2] &= ~(value & 0x2a);
         /* ...and set the plain r/w bits */
+        s->pm_regs[addr >> 2] &= ~0x15;
         s->pm_regs[addr >> 2] |= value & 0x15;
         break;