From: Ilya Leoshkevich Date: Mon, 24 Jul 2023 08:15:57 +0000 (+0200) Subject: target/s390x: Fix ICM with M3=0 X-Git-Tag: qemu-xen-4.18.0-rc5~42 X-Git-Url: http://xenbits.xensource.com/gitweb?a=commitdiff_plain;h=76507abbe1dbdce7a3ecd7a7b19418b38ce6666c;p=qemu-xen.git target/s390x: Fix ICM with M3=0 When the mask is zero, access exceptions should still be recognized for 1 byte at the second-operand address. CC should be set to 0. Cc: qemu-stable@nongnu.org Fixes: e023e832d0ac ("s390x: translate engine for s390x CPU") Reviewed-by: David Hildenbrand Reviewed-by: Richard Henderson Signed-off-by: Ilya Leoshkevich Message-Id: <20230724082032.66864-5-iii@linux.ibm.com> Signed-off-by: Thomas Huth (cherry picked from commit a2025557ed4d8d5e6a4d0dd681717c390f51f5be) Signed-off-by: Michael Tokarev --- diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c index f005539861..9e9fa3cef0 100644 --- a/target/s390x/tcg/translate.c +++ b/target/s390x/tcg/translate.c @@ -2525,6 +2525,12 @@ static DisasJumpType op_icm(DisasContext *s, DisasOps *o) ccm = ((1ull << len) - 1) << pos; break; + case 0: + /* Recognize access exceptions for the first byte. */ + tcg_gen_qemu_ld_i64(tmp, o->in2, get_mem_index(s), MO_UB); + gen_op_movi_cc(s, 0); + return DISAS_NEXT; + default: /* This is going to be a sequence of loads and inserts. */ pos = base + 32 - 8;