From: Andrew Cooper Date: Mon, 15 May 2023 15:59:25 +0000 (+0100) Subject: x86/vtx: Remove opencoded MSR_ARCH_CAPS check X-Git-Tag: RELEASE-4.14.6~26 X-Git-Url: http://xenbits.xensource.com/gitweb?a=commitdiff_plain;h=7320e9aa80f5da23abf76b41b2e93708fa1689b4;p=xen.git x86/vtx: Remove opencoded MSR_ARCH_CAPS check MSR_ARCH_CAPS data is now included in featureset information. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 8f6bc7f9b72eb7cf0c8c5ae5d80498a58ba0b7c3) --- diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index b919b728c8..ed8c8f15bb 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -2464,8 +2464,6 @@ static void __init ler_to_fixup_check(void); */ static bool __init has_if_pschange_mc(void) { - uint64_t caps = 0; - /* * If we are virtualised, there is nothing we can do. Our EPT tables are * shadowed by our hypervisor, and not walked by hardware. @@ -2473,10 +2471,8 @@ static bool __init has_if_pschange_mc(void) if ( cpu_has_hypervisor ) return false; - if ( cpu_has_arch_caps ) - rdmsrl(MSR_ARCH_CAPABILITIES, caps); - - if ( caps & ARCH_CAPS_IF_PSCHANGE_MC_NO ) + /* Hardware reports itself as fixed. */ + if ( cpu_has_if_pschange_mc_no ) return false; /* diff --git a/xen/include/asm-x86/cpufeature.h b/xen/include/asm-x86/cpufeature.h index e93e72bbbd..e44643e393 100644 --- a/xen/include/asm-x86/cpufeature.h +++ b/xen/include/asm-x86/cpufeature.h @@ -142,6 +142,9 @@ /* CPUID level 0x00000007:1.eax */ #define cpu_has_avx512_bf16 boot_cpu_has(X86_FEATURE_AVX512_BF16) +/* MSR_ARCH_CAPS */ +#define cpu_has_if_pschange_mc_no boot_cpu_has(X86_FEATURE_IF_PSCHANGE_MC_NO) + /* Synthesized. */ #define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON) #define cpu_has_cpuid_faulting boot_cpu_has(X86_FEATURE_CPUID_FAULTING)