From: bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>
Date: Sun, 22 Feb 2004 13:40:57 +0000 (+0000)
Subject: zero offset optimisation
X-Git-Tag: release_0_9_0-iwjtag~1760
X-Git-Url: http://xenbits.xensource.com/gitweb?a=commitdiff_plain;h=537730b956572a9e32adfa2e18164e8234594c08;p=qemu-xen-unstable.git

zero offset optimisation


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@635 c046a42c-6fe2-441c-8c8c-71466251a162
---

diff --git a/target-arm/translate.c b/target-arm/translate.c
index 50fe8aa5e5..3efd55ee3e 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -279,7 +279,8 @@ static inline void gen_add_data_offset(DisasContext *s, unsigned int insn)
         val = insn & 0xfff;
         if (!(insn & (1 << 23)))
             val = -val;
-        gen_op_addl_T1_im(val);
+        if (val != 0)
+            gen_op_addl_T1_im(val);
     } else {
         /* shift/register */
         rm = (insn) & 0xf;
@@ -304,7 +305,8 @@ static inline void gen_add_datah_offset(DisasContext *s, unsigned int insn)
         val = (insn & 0xf) | ((insn >> 4) & 0xf0);
         if (!(insn & (1 << 23)))
             val = -val;
-        gen_op_addl_T1_im(val);
+        if (val != 0)
+            gen_op_addl_T1_im(val);
     } else {
         /* register */
         rm = (insn) & 0xf;