From: ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>
Date: Mon, 21 Jul 2008 07:46:03 +0000 (+0000)
Subject: Fix logging output for MIPS HI, LO registers, by Stefan Weil.
X-Git-Tag: stefano.display-merge-start~873
X-Git-Url: http://xenbits.xensource.com/gitweb?a=commitdiff_plain;h=3d5be8709be245c7631a65753666aaea3cae2342;p=qemu-xen-4.3-testing.git

Fix logging output for MIPS HI, LO registers, by Stefan Weil.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4916 c046a42c-6fe2-441c-8c8c-71466251a162
---

diff --git a/target-mips/translate.c b/target-mips/translate.c
index 3b848225a..bce010c03 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -8694,7 +8694,8 @@ void cpu_dump_state (CPUState *env, FILE *f,
     int i;
 
     cpu_fprintf(f, "pc=0x" TARGET_FMT_lx " HI=0x" TARGET_FMT_lx " LO=0x" TARGET_FMT_lx " ds %04x " TARGET_FMT_lx " %d\n",
-                env->active_tc.PC, env->active_tc.HI, env->active_tc.LO, env->hflags, env->btarget, env->bcond);
+                env->active_tc.PC, env->active_tc.HI[0], env->active_tc.LO[0],
+                env->hflags, env->btarget, env->bcond);
     for (i = 0; i < 32; i++) {
         if ((i & 3) == 0)
             cpu_fprintf(f, "GPR%02d:", i);