From: Aurelien Jarno <aurelien@aurel32.net>
Date: Thu, 30 Jul 2015 20:13:26 +0000 (+0200)
Subject: tcg/s390x: Mask TCGMemOp appropriately for indexing
X-Git-Tag: qemu-xen-4.7.0-rc1~127^2~1
X-Git-Url: http://xenbits.xensource.com/gitweb?a=commitdiff_plain;h=3c8691f568f49bf623dcb2850464d4156d95e61b;p=qemu-xen.git

tcg/s390x: Mask TCGMemOp appropriately for indexing

Commit 2b7ec66f fixed TCGMemOp masking following the MO_AMASK addition,
but two cases were forgotten in the TCG S390 backend.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---

diff --git a/tcg/s390/tcg-target.c b/tcg/s390/tcg-target.c
index 921991ebfa..aa718eca0c 100644
--- a/tcg/s390/tcg-target.c
+++ b/tcg/s390/tcg-target.c
@@ -1390,7 +1390,7 @@ static void tcg_out_call(TCGContext *s, tcg_insn_unit *dest)
 static void tcg_out_qemu_ld_direct(TCGContext *s, TCGMemOp opc, TCGReg data,
                                    TCGReg base, TCGReg index, int disp)
 {
-    switch (opc) {
+    switch (opc & (MO_SSIZE | MO_BSWAP)) {
     case MO_UB:
         tcg_out_insn(s, RXY, LLGC, data, base, index, disp);
         break;
@@ -1449,7 +1449,7 @@ static void tcg_out_qemu_ld_direct(TCGContext *s, TCGMemOp opc, TCGReg data,
 static void tcg_out_qemu_st_direct(TCGContext *s, TCGMemOp opc, TCGReg data,
                                    TCGReg base, TCGReg index, int disp)
 {
-    switch (opc) {
+    switch (opc & (MO_SIZE | MO_BSWAP)) {
     case MO_UB:
         if (disp >= 0 && disp < 0x1000) {
             tcg_out_insn(s, RX, STC, data, base, index, disp);