From: Peter Maydell <peter.maydell@linaro.org>
Date: Tue, 6 Feb 2018 10:39:41 +0000 (+0000)
Subject: target/arm/translate.c: Fix missing 'break' for TT insns
X-Git-Tag: qemu-xen-4.12.0-rc1~462^2~1
X-Git-Url: http://xenbits.xensource.com/gitweb?a=commitdiff_plain;h=384c6c03fb687bea239a5990a538c4bc50fdcecb;p=qemu-xen.git

target/arm/translate.c: Fix missing 'break' for TT insns

The code where we added the TT instruction was accidentally
missing a 'break', which meant that after generating the code
to execute the TT we would fall through to 'goto illegal_op'
and generate code to take an UNDEF insn.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20180206103941.13985-1-peter.maydell@linaro.org
---

diff --git a/target/arm/translate.c b/target/arm/translate.c
index a8c13d3758..1270022289 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -9925,6 +9925,7 @@ static void disas_thumb2_insn(DisasContext *s, uint32_t insn)
                         tcg_temp_free_i32(addr);
                         tcg_temp_free_i32(op);
                         store_reg(s, rd, ttresp);
+                        break;
                     }
                     goto illegal_op;
                 }