From: Peter Maydell Date: Thu, 5 Feb 2015 13:37:23 +0000 (+0000) Subject: target-arm/translate-a64: Fix wrong mmu_idx usage for LDT/STT X-Git-Tag: qemu-xen-4.6.0-rc1~34^2~19 X-Git-Url: http://xenbits.xensource.com/gitweb?a=commitdiff_plain;h=3750d2588e8d8d204820fef4ce95d7c271bafd3f;p=qemu-upstream-unstable.git target-arm/translate-a64: Fix wrong mmu_idx usage for LDT/STT The LDT/STT (load/store unprivileged) instruction decode was using the wrong MMU index value. This meant that instead of these insns being "always access as if user-mode regardless of current privilege" they were "always access as if kernel-mode regardless of current privilege". This went unnoticed because AArch64 Linux doesn't use these instructions. Cc: qemu-stable@nongnu.org Signed-off-by: Peter Maydell Reviewed-by: Greg Bellows Reviewed-by: Edgar E. Iglesias --- I'm not counting this as a security issue because I'm assuming nobody treats TCG guests as a security boundary (certainly I would not recommend doing so...) (cherry picked from commit 949013ce111eb64f8bc81cf9a9f1cefd6a1678c3) Signed-off-by: Michael Roth --- diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c index 80d2c07e8..97206aadd 100644 --- a/target-arm/translate-a64.c +++ b/target-arm/translate-a64.c @@ -2107,7 +2107,7 @@ static void disas_ldst_reg_imm9(DisasContext *s, uint32_t insn) } } else { TCGv_i64 tcg_rt = cpu_reg(s, rt); - int memidx = is_unpriv ? 1 : get_mem_index(s); + int memidx = is_unpriv ? MMU_USER_IDX : get_mem_index(s); if (is_store) { do_gpr_st_memidx(s, tcg_rt, tcg_addr, size, memidx);