From: Sergey Fedorov Date: Mon, 6 Jul 2015 09:05:43 +0000 (+0100) Subject: target-arm: fix write helper for TLBI ALLE1IS X-Git-Tag: qemu-xen-4.7.0-rc1~197^2~6 X-Git-Url: http://xenbits.xensource.com/gitweb?a=commitdiff_plain;h=2a6332d968297266dbabf9d33f959e3a5efdd0f9;p=qemu-xen.git target-arm: fix write helper for TLBI ALLE1IS TLBI ALLE1IS is an operation that does invalidate TLB entries on all PEs in the same Inner Sharable domain, not just on the current CPU. So we must use tlbiall_is_write() here. Signed-off-by: Sergey Fedorov Message-id: 1435676538-31345-1-git-send-email-serge.fdrv@gmail.com Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- diff --git a/target-arm/helper.c b/target-arm/helper.c index aa341599cf..b87afe7cde 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -2441,7 +2441,7 @@ static const ARMCPRegInfo v8_cp_reginfo[] = { { .name = "TLBI_ALLE1IS", .state = ARM_CP_STATE_AA64, .opc0 = 1, .opc1 = 4, .crn = 8, .crm = 3, .opc2 = 4, .access = PL2_W, .type = ARM_CP_NO_RAW, - .writefn = tlbiall_write }, + .writefn = tlbiall_is_write }, { .name = "TLBI_VMALLE1IS", .state = ARM_CP_STATE_AA64, .opc0 = 1, .opc1 = 0, .crn = 8, .crm = 3, .opc2 = 0, .access = PL1_W, .type = ARM_CP_NO_RAW,