From: Andrew Cooper Date: Sat, 26 Mar 2016 18:19:20 +0000 (+0000) Subject: Improve the legibility of the pagetable generation code X-Git-Url: http://xenbits.xensource.com/gitweb?a=commitdiff_plain;h=2664b843c34f0d05e15888ac43c30d909ba3baa3;p=people%2Froyger%2Fxen-test-framework.git Improve the legibility of the pagetable generation code Factor the common _PAGE_xxx attributes out into PAGE_COMMON, and introduce a macro for the index calculation. Add _ACCESSED and _DIRTY to the common attributes, to avoid the processor needing to set the bits. Signed-off-by: Andrew Cooper --- diff --git a/arch/x86/hvm_pagetables.S b/arch/x86/hvm_pagetables.S index 509a3bc..2e0bd5a 100644 --- a/arch/x86/hvm_pagetables.S +++ b/arch/x86/hvm_pagetables.S @@ -2,6 +2,10 @@ #include +#define PAGE_COMMON _PAGE_DIRTY + _PAGE_ACCESSED + _PAGE_USER + _PAGE_RW + _PAGE_PRESENT + +#define PAE_IDX(sym) ((. - (sym)) / PAE_PTE_SZ) + .data .p2align PAGE_SHIFT @@ -9,19 +13,17 @@ GLOBAL(pae_l1_identmap) .long 0, 0 /* Unmap page at 0 to catch errors with NULL pointers. */ .rept PAE_L1_PT_ENTRIES - 1 - .long (((. - pae_l1_identmap) / 8) << PAE_L1_PT_SHIFT) + \ - _PAGE_USER + _PAGE_RW + _PAGE_PRESENT + .long (PAE_IDX(pae_l1_identmap) << PAE_L1_PT_SHIFT) + PAGE_COMMON .long 0 .endr SIZE(pae_l1_identmap) /* PAE mappings up to 4G, mostly in 2M superpages. Uses 4x 4k pages. */ GLOBAL(pae_l2_identmap) - .long pae_l1_identmap + _PAGE_USER + _PAGE_RW + _PAGE_PRESENT + .long pae_l1_identmap + PAGE_COMMON .long 0 .rept (4 * PAE_L2_PT_ENTRIES) - 1 - .long (((. - pae_l2_identmap) / 8) << PAE_L2_PT_SHIFT) + \ - _PAGE_PSE + _PAGE_USER + _PAGE_RW + _PAGE_PRESENT + .long (PAE_IDX(pae_l2_identmap) << PAE_L2_PT_SHIFT) + _PAGE_PSE + PAGE_COMMON .long 0 .endr SIZE(pae_l2_identmap) @@ -29,8 +31,7 @@ SIZE(pae_l2_identmap) /* PAE l3 pagetable. Maps 4x l2 tables. */ GLOBAL(pae_l3_identmap) .rept 4 - .long pae_l2_identmap + (((. - pae_l3_identmap) / 8 ) << PAGE_SHIFT) + \ - _PAGE_USER + _PAGE_RW + _PAGE_PRESENT + .long pae_l2_identmap + (PAE_IDX(pae_l3_identmap) << PAGE_SHIFT) + PAGE_COMMON .long 0 .endr .fill PAE_L3_PT_ENTRIES - 4, 8, 0 @@ -38,7 +39,7 @@ SIZE(pae_l3_identmap) /* PAE l4 pagetable. Maps 1x l3 table. */ GLOBAL(pae_l4_identmap) - .long pae_l3_identmap + _PAGE_USER + _PAGE_RW + _PAGE_PRESENT + .long pae_l3_identmap + PAGE_COMMON .long 0 .fill PAE_L4_PT_ENTRIES - 1, 8, 0 SIZE(pae_l4_identmap) @@ -46,7 +47,7 @@ SIZE(pae_l4_identmap) /* PAE l3 32bit quad. Contains 4 64bit entries. */ GLOBAL(pae32_l3_identmap) .rept PAE32_L3_ENTRIES - .long pae_l2_identmap + (((. - pae32_l3_identmap) / 8 ) << PAGE_SHIFT) + _PAGE_PRESENT + .long pae_l2_identmap + (PAE_IDX(pae32_l3_identmap) << PAGE_SHIFT) + _PAGE_PRESENT .long 0 .endr SIZE(pae32_l3_identmap) diff --git a/include/arch/x86/page.h b/include/arch/x86/page.h index f12931f..171d93b 100644 --- a/include/arch/x86/page.h +++ b/include/arch/x86/page.h @@ -20,6 +20,8 @@ #define _PAGE_PRESENT 0x001 #define _PAGE_RW 0x002 #define _PAGE_USER 0x004 +#define _PAGE_ACCESSED 0x020 +#define _PAGE_DIRTY 0x040 #define _PAGE_PSE 0x080 #if CONFIG_PAGING_LEVELS >= 3 /* PAE Paging */