From: Andrew Cooper Date: Tue, 30 May 2023 15:03:16 +0000 (+0100) Subject: x86/spec-ctrl: Update hardware hints X-Git-Tag: RELEASE-4.14.6~23 X-Git-Url: http://xenbits.xensource.com/gitweb?a=commitdiff_plain;h=06a2b62145f742816f8377fae22a21fe1dfe2059;p=xen.git x86/spec-ctrl: Update hardware hints * Rename IBRS_ALL to EIBRS. EIBRS is the term that everyone knows, and this makes ARCH_CAPS_EIBRS match the X86_FEATURE_EIBRS form. * Print RRSBA too, which is also a hint about behaviour. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 94200e1bae07e725cc07238c11569c5cab7befb7) --- diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index 549c6f2e5a..20d1bac126 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -420,10 +420,11 @@ static void __init print_details(enum ind_thunk thunk) * Hardware read-only information, stating immunity to certain issues, or * suggestions of which mitigation to use. */ - printk(" Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", + printk(" Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", (caps & ARCH_CAPS_RDCL_NO) ? " RDCL_NO" : "", - (caps & ARCH_CAPS_IBRS_ALL) ? " IBRS_ALL" : "", + (caps & ARCH_CAPS_EIBRS) ? " EIBRS" : "", (caps & ARCH_CAPS_RSBA) ? " RSBA" : "", + (caps & ARCH_CAPS_RRSBA) ? " RRSBA" : "", (caps & ARCH_CAPS_SKIP_L1DFL) ? " SKIP_L1DFL" : "", (e8b & cpufeat_mask(X86_FEATURE_SSB_NO)) || (caps & ARCH_CAPS_SSB_NO) ? " SSB_NO" : "", diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-index.h index ce5677f3b6..7befa60abd 100644 --- a/xen/include/asm-x86/msr-index.h +++ b/xen/include/asm-x86/msr-index.h @@ -48,7 +48,7 @@ #define MSR_ARCH_CAPABILITIES 0x0000010a #define ARCH_CAPS_RDCL_NO (_AC(1, ULL) << 0) -#define ARCH_CAPS_IBRS_ALL (_AC(1, ULL) << 1) +#define ARCH_CAPS_EIBRS (_AC(1, ULL) << 1) #define ARCH_CAPS_RSBA (_AC(1, ULL) << 2) #define ARCH_CAPS_SKIP_L1DFL (_AC(1, ULL) << 3) #define ARCH_CAPS_SSB_NO (_AC(1, ULL) << 4)