From: Max Filippov <jcmvbkbc@gmail.com>
Date: Mon, 18 Feb 2019 15:15:10 +0000 (-0800)
Subject: tests/tcg/xtensa: conditionalize and fix s32c1i tests
X-Git-Tag: qemu-xen-4.13.0-rc1~348^2~8
X-Git-Url: http://xenbits.xensource.com/gitweb?a=commitdiff_plain;h=00988da4860c363522daa39709cb5985d6a6033a;p=qemu-xen.git

tests/tcg/xtensa: conditionalize and fix s32c1i tests

Make s32c1i tests conditional on the presence of this option. Initialize
ATOMCTL SR when it's present to allow RCW transactions on uncached
memory.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
---

diff --git a/tests/tcg/xtensa/test_s32c1i.S b/tests/tcg/xtensa/test_s32c1i.S
index 93b575db95..2885d9d003 100644
--- a/tests/tcg/xtensa/test_s32c1i.S
+++ b/tests/tcg/xtensa/test_s32c1i.S
@@ -2,7 +2,13 @@
 
 test_suite s32c1i
 
+#if XCHAL_HAVE_S32C1I
+
 test s32c1i_nowrite
+#if XCHAL_HW_VERSION >= 230000
+    movi    a2, 0x29
+    wsr     a2, atomctl
+#endif
     movi    a2, 1f
     movi    a3, 1
     wsr     a3, scompare1
@@ -20,6 +26,10 @@ test s32c1i_nowrite
 test_end
 
 test s32c1i_write
+#if XCHAL_HW_VERSION >= 230000
+    movi    a2, 0x29
+    wsr     a2, atomctl
+#endif
     movi    a2, 1f
     movi    a3, 3
     wsr     a3, scompare1
@@ -36,4 +46,6 @@ test s32c1i_write
 .text
 test_end
 
+#endif
+
 test_suite_end