This function parses Xen OVMF info and arrange memory maps accordingly.
It also sets PcdPciAllowFullEnumeration to false to prevent OVMF from
playing with PCI devices.
Signed-off-by: Wei Liu <wei.liu2@citrix.com>
!else\r
DebugLib|OvmfPkg/Library/PlatformDebugLibIoPort/PlatformDebugLibIoPort.inf\r
!endif\r
- PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf\r
+ PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf\r
UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf\r
\r
[LibraryClasses.common.DXE_DRIVER]\r
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64|0\r
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0\r
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdPciAllowFullEnumeration|TRUE\r
\r
\r
################################################################################\r
MdeModulePkg/Core/Pei/PeiMain.inf\r
MdeModulePkg/Universal/PCD/Pei/Pcd.inf {\r
<LibraryClasses>\r
- PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf\r
+ PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf\r
}\r
IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf\r
MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r
!else\r
DebugLib|OvmfPkg/Library/PlatformDebugLibIoPort/PlatformDebugLibIoPort.inf\r
!endif\r
- PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf\r
+ PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf\r
UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf\r
\r
[LibraryClasses.common.DXE_DRIVER]\r
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64|0\r
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0\r
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdPciAllowFullEnumeration|TRUE\r
\r
\r
################################################################################\r
MdeModulePkg/Core/Pei/PeiMain.inf\r
MdeModulePkg/Universal/PCD/Pei/Pcd.inf {\r
<LibraryClasses>\r
- PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf\r
+ PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf\r
}\r
IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf\r
MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r
!else\r
DebugLib|OvmfPkg/Library/PlatformDebugLibIoPort/PlatformDebugLibIoPort.inf\r
!endif\r
- PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf\r
+ PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf\r
UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf\r
\r
[LibraryClasses.common.DXE_DRIVER]\r
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64|0\r
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0\r
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdPciAllowFullEnumeration|TRUE\r
\r
\r
################################################################################\r
MdeModulePkg/Core/Pei/PeiMain.inf\r
MdeModulePkg/Universal/PCD/Pei/Pcd.inf {\r
<LibraryClasses>\r
- PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf\r
+ PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf\r
}\r
IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf\r
MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r
#include <Guid/MemoryTypeInformation.h>\r
#include <Ppi/MasterBootMode.h>\r
#include <IndustryStandard/Pci22.h>\r
+#include <Guid/XenInfo.h>\r
+#include <IndustryStandard/E820.h>\r
+#include <Library/ResourcePublicationLib.h>\r
+#include <Library/MtrrLib.h>\r
\r
#include "Platform.h"\r
#include "Cmos.h"\r
AddUntestedMemoryBaseSizeHob (MemoryBase, (UINT64)(MemoryLimit - MemoryBase));\r
}\r
\r
+VOID\r
+XenMemMapInitialization (\r
+ VOID\r
+ )\r
+{\r
+ EFI_HOB_GUID_TYPE *GuidHob;\r
+ EFI_XEN_INFO *Info;\r
+\r
+ DEBUG ((EFI_D_ERROR, "Using memory map provided by Xen\n"));\r
+\r
+ GuidHob = GetFirstGuidHob (&gEfiXenInfoGuid);\r
+\r
+ ASSERT (GuidHob != NULL);\r
+\r
+ Info = GET_GUID_HOB_DATA (GuidHob);\r
+\r
+ //\r
+ // Create Memory Type Information HOB\r
+ //\r
+ BuildGuidDataHob (\r
+ &gEfiMemoryTypeInformationGuid,\r
+ mDefaultMemoryTypeInformation,\r
+ sizeof(mDefaultMemoryTypeInformation)\r
+ );\r
+\r
+ //\r
+ // Add PCI IO Port space available for PCI resource allocations.\r
+ //\r
+ BuildResourceDescriptorHob (\r
+ EFI_RESOURCE_IO,\r
+ EFI_RESOURCE_ATTRIBUTE_PRESENT |\r
+ EFI_RESOURCE_ATTRIBUTE_INITIALIZED,\r
+ 0xC000,\r
+ 0x4000\r
+ );\r
+\r
+ //\r
+ // Video memory + Legacy BIOS region\r
+ //\r
+ AddIoMemoryRangeHob (0x0A0000, BASE_1MB);\r
+\r
+ //\r
+ // Parse RAM in E820 map\r
+ //\r
+ if (Info->E820EntryCount > 0) {\r
+ EFI_E820_ENTRY64 *E820Map, *Entry;\r
+ UINT16 Loop;\r
+\r
+ E820Map = Info->E820;\r
+ for (Loop = 0; Loop < Info->E820EntryCount; Loop++) {\r
+ Entry = E820Map + Loop;\r
+\r
+ // only care about RAM\r
+ if (Entry->Type != EfiAcpiAddressRangeMemory)\r
+ continue;\r
+\r
+ if (Entry->BaseAddr >= BASE_4GB)\r
+ AddUntestedMemoryBaseSizeHob (Entry->BaseAddr, Entry->Length);\r
+ else\r
+ AddMemoryBaseSizeHob (Entry->BaseAddr, Entry->Length);\r
+\r
+ MtrrSetMemoryAttribute (Entry->BaseAddr, Entry->Length, CacheWriteBack);\r
+ }\r
+ }\r
+}\r
+\r
\r
VOID\r
MemMapInitialization (\r
\r
XenLeaf = XenDetect ();\r
\r
- TopOfMemory = MemDetect ();\r
+ if (XenLeaf != 0) {\r
+ PublishPeiMemory ();\r
+ PcdSetBool (PcdPciAllowFullEnumeration, FALSE);\r
+ } else\r
+ TopOfMemory = MemDetect ();\r
\r
if (XenLeaf != 0) {\r
DEBUG ((EFI_D_INFO, "Xen was detected\n"));\r
\r
PeiFvInitialization ();\r
\r
- MemMapInitialization (TopOfMemory);\r
+ if (XenLeaf != 0)\r
+ XenMemMapInitialization ();\r
+ else\r
+ MemMapInitialization (TopOfMemory);\r
\r
MiscInitialization ();\r
\r
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize\r
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize\r
gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvStoreReserved\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdPciAllowFullEnumeration\r
gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress\r
\r
[Ppis]\r