uint8_t slot = dev->sbdf.dev;
uint8_t func = dev->sbdf.func;
- pos = pci_find_cap_offset(seg, bus, slot, func, PCI_CAP_ID_MSI);
+ pos = pci_find_cap_offset(dev->sbdf, PCI_CAP_ID_MSI);
if ( pos )
__msi_set_enable(seg, bus, slot, func, pos, enable);
}
static void msix_set_enable(struct pci_dev *dev, int enable)
{
int pos;
- uint16_t control, seg = dev->sbdf.seg;
- uint8_t bus = dev->sbdf.bus;
- uint8_t slot = dev->sbdf.dev;
- uint8_t func = dev->sbdf.func;
+ uint16_t control;
- pos = pci_find_cap_offset(seg, bus, slot, func, PCI_CAP_ID_MSIX);
+ pos = pci_find_cap_offset(dev->sbdf, PCI_CAP_ID_MSIX);
if ( pos )
{
control = pci_conf_read16(dev->sbdf, msix_control_reg(pos));
struct msi_desc *entry;
int pos;
unsigned int i, maxvec, mpos;
- uint16_t control, seg = dev->sbdf.seg;
- uint8_t bus = dev->sbdf.bus;
- uint8_t slot = dev->sbdf.dev;
- uint8_t func = dev->sbdf.func;
+ uint16_t control;
ASSERT(pcidevs_locked());
- pos = pci_find_cap_offset(seg, bus, slot, func, PCI_CAP_ID_MSI);
+ pos = pci_find_cap_offset(dev->sbdf, PCI_CAP_ID_MSI);
if ( !pos )
return -ENODEV;
control = pci_conf_read16(dev->sbdf, msi_control_reg(pos));
if ( vf >= 0 )
{
struct pci_dev *pdev = pci_get_pdev(seg, bus, PCI_DEVFN(slot, func));
- unsigned int pos = pci_find_ext_capability(seg, bus,
- PCI_DEVFN(slot, func),
- PCI_EXT_CAP_ID_SRIOV);
+ unsigned int pos = pci_find_ext_capability(sbdf, PCI_EXT_CAP_ID_SRIOV);
u16 ctrl = pci_conf_read16(sbdf, pos + PCI_SRIOV_CTRL);
u16 num_vf = pci_conf_read16(sbdf, pos + PCI_SRIOV_NUM_VF);
u16 offset = pci_conf_read16(sbdf, pos + PCI_SRIOV_VF_OFFSET);
int pos, nr_entries;
struct pci_dev *pdev;
u16 control;
- u8 slot = PCI_SLOT(msi->devfn);
- u8 func = PCI_FUNC(msi->devfn);
struct msi_desc *old_desc;
ASSERT(pcidevs_locked());
pdev = pci_get_pdev(msi->seg, msi->bus, msi->devfn);
- pos = pci_find_cap_offset(msi->seg, msi->bus, slot, func, PCI_CAP_ID_MSIX);
+ pos = pci_find_cap_offset(PCI_SBDF3_T(msi->seg, msi->bus, msi->devfn),
+ PCI_CAP_ID_MSIX);
if ( !pdev || !pos )
return -ENODEV;
static void __pci_disable_msix(struct msi_desc *entry)
{
struct pci_dev *dev = entry->dev;
- uint16_t seg = dev->sbdf.seg;
- uint8_t bus = dev->sbdf.bus;
- uint8_t slot = dev->sbdf.dev;
- uint8_t func = dev->sbdf.func;
- unsigned int pos = pci_find_cap_offset(seg, bus, slot, func,
- PCI_CAP_ID_MSIX);
+ unsigned int pos = pci_find_cap_offset(dev->sbdf, PCI_CAP_ID_MSIX);
uint16_t control = pci_conf_read16(dev->sbdf,
msix_control_reg(entry->msi_attrib.pos));
bool maskall = dev->msix->host_maskall;
{
int rc;
struct pci_dev *pdev;
- u8 slot = PCI_SLOT(devfn), func = PCI_FUNC(devfn);
- unsigned int pos = pci_find_cap_offset(seg, bus, slot, func,
+ unsigned int pos = pci_find_cap_offset(PCI_SBDF3_T(seg, bus, devfn),
PCI_CAP_ID_MSIX);
if ( !use_msi )
int pci_msi_conf_write_intercept(struct pci_dev *pdev, unsigned int reg,
unsigned int size, uint32_t *data)
{
- uint16_t seg = pdev->sbdf.seg;
- uint8_t bus = pdev->sbdf.bus;
- uint8_t slot = pdev->sbdf.dev;
- uint8_t func = pdev->sbdf.func;
struct msi_desc *entry;
unsigned int pos;
{
entry = find_msi_entry(pdev, -1, PCI_CAP_ID_MSIX);
pos = entry ? entry->msi_attrib.pos
- : pci_find_cap_offset(seg, bus, slot, func,
- PCI_CAP_ID_MSIX);
+ : pci_find_cap_offset(pdev->sbdf, PCI_CAP_ID_MSIX);
ASSERT(pos);
if ( reg >= pos && reg < msix_pba_offset_reg(pos) + 4 )
if ( (class >> 8) != PCI_CLASS_SERIAL_USB_EHCI )
return 0;
- return pci_find_cap_offset(0, bus, slot, func, PCI_CAP_ID_EHCI_DEBUG);
+ return pci_find_cap_offset(PCI_SBDF_T(0, bus, slot, func),
+ PCI_CAP_ID_EHCI_DEBUG);
}
static unsigned int __init find_dbgp(struct ehci_dbgp *dbgp,
{
int pos;
- pos = pci_find_cap_offset(seg, bus, dev, func, PCI_CAP_ID_MSI);
+ pos = pci_find_cap_offset(PCI_SBDF_T(seg, bus, dev, func), PCI_CAP_ID_MSI);
if ( !pos )
return -ENODEV;
{
u32 value;
int pos;
+ const pci_sbdf_t sbdf = {
+ .seg = seg,
+ .bus = bus,
+ .extfunc = devfn,
+ };
- pos = pci_find_ext_capability(seg, bus, devfn, PCI_EXT_CAP_ID_ATS);
+ pos = pci_find_ext_capability(sbdf, PCI_EXT_CAP_ID_ATS);
BUG_ON(!pos);
- value = pci_conf_read16(PCI_SBDF3_T(seg, bus, devfn), pos + ATS_REG_CTL);
+ value = pci_conf_read16(sbdf, pos + ATS_REG_CTL);
return value & ATS_ENABLE;
}
if ( !ats_enabled )
return 0;
- return pci_find_ext_capability(seg, bus, devfn, PCI_EXT_CAP_ID_ATS);
+ return pci_find_ext_capability(PCI_SBDF3_T(seg, bus, devfn),
+ PCI_EXT_CAP_ID_ATS);
}
#endif /* _ATS_H_ */
pdev->domain = NULL;
INIT_LIST_HEAD(&pdev->msi_list);
- if ( pci_find_cap_offset(pseg->nr, bus, PCI_SLOT(devfn), PCI_FUNC(devfn),
- PCI_CAP_ID_MSIX) )
+ if ( pci_find_cap_offset(pdev->sbdf, PCI_CAP_ID_MSIX) )
{
struct arch_msix *msix = xzalloc(struct arch_msix);
break;
case DEV_TYPE_PCIe_ENDPOINT:
- pos = pci_find_cap_offset(pseg->nr, bus, PCI_SLOT(devfn),
- PCI_FUNC(devfn), PCI_CAP_ID_EXP);
+ pos = pci_find_cap_offset(pdev->sbdf, PCI_CAP_ID_EXP);
BUG_ON(!pos);
cap = pci_conf_read16(pdev->sbdf, pos + PCI_EXP_DEVCAP);
if ( cap & PCI_EXP_DEVCAP_PHANTOM )
static void pci_enable_acs(struct pci_dev *pdev)
{
int pos;
- uint16_t cap, ctrl, seg = pdev->sbdf.seg;
- uint8_t bus = pdev->sbdf.bus;
+ uint16_t cap, ctrl;
if ( !iommu_enabled )
return;
- pos = pci_find_ext_capability(seg, bus, pdev->sbdf.extfunc, PCI_EXT_CAP_ID_ACS);
+ pos = pci_find_ext_capability(pdev->sbdf, PCI_EXT_CAP_ID_ACS);
if (!pos)
return;
if ( !pdev->info.is_virtfn && !pdev->vf_rlen[0] )
{
- unsigned int pos = pci_find_ext_capability(seg, bus, devfn,
+ unsigned int pos = pci_find_ext_capability(pdev->sbdf,
PCI_EXT_CAP_ID_SRIOV);
u16 ctrl = pci_conf_read16(pdev->sbdf, pos + PCI_SRIOV_CTRL);
{
u16 class_device, creg;
u8 d = PCI_SLOT(devfn), f = PCI_FUNC(devfn);
- int pos = pci_find_cap_offset(seg, bus, d, f, PCI_CAP_ID_EXP);
const pci_sbdf_t sbdf = {
.seg = seg,
.bus = bus,
.dev = d,
.func = f,
};
+ int pos = pci_find_cap_offset(sbdf, PCI_CAP_ID_EXP);
class_device = pci_conf_read16(sbdf, PCI_CLASS_DEVICE);
switch ( class_device )
static bool_t hest_match_type(const struct acpi_hest_header *hest_hdr,
const struct pci_dev *pdev)
{
- unsigned int pos = pci_find_cap_offset(pdev->sbdf.seg, pdev->sbdf.bus,
- pdev->sbdf.dev, pdev->sbdf.func,
- PCI_CAP_ID_EXP);
+ unsigned int pos = pci_find_cap_offset(pdev->sbdf, PCI_CAP_ID_EXP);
uint8_t pcie = MASK_EXTR(pci_conf_read16(pdev->sbdf, pos + PCI_EXP_FLAGS),
PCI_EXP_FLAGS_TYPE);
{
struct aer_hest_parse_info info = { .pdev = pdev };
- return pci_find_cap_offset(pdev->sbdf.seg, pdev->sbdf.bus, pdev->sbdf.dev,
- pdev->sbdf.func, PCI_CAP_ID_EXP) &&
+ return pci_find_cap_offset(pdev->sbdf, PCI_CAP_ID_EXP) &&
apei_hest_parse(aer_hest_parse, &info) >= 0 &&
info.firmware_first;
}
void pci_vtd_quirk(const struct pci_dev *pdev)
{
- int seg = pdev->sbdf.seg;
- int bus = pdev->sbdf.bus;
int pos;
bool_t ff;
u32 val, val2;
/* Sandybridge-EP (Romley) */
case 0x3c00: /* host bridge */
case 0x3c01 ... 0x3c0b: /* root ports */
- pos = pci_find_ext_capability(seg, bus, pdev->sbdf.extfunc,
- PCI_EXT_CAP_ID_ERR);
+ pos = pci_find_ext_capability(pdev->sbdf, PCI_EXT_CAP_ID_ERR);
if ( !pos )
{
- pos = pci_find_ext_capability(seg, bus, pdev->sbdf.extfunc,
- PCI_EXT_CAP_ID_VNDR);
+ pos = pci_find_ext_capability(pdev->sbdf, PCI_EXT_CAP_ID_VNDR);
while ( pos )
{
val = pci_conf_read32(pdev->sbdf, pos + PCI_VNDR_HEADER);
pos += PCI_VNDR_HEADER;
break;
}
- pos = pci_find_next_ext_capability(seg, bus, pdev->sbdf.extfunc,
- pos, PCI_EXT_CAP_ID_VNDR);
+ pos = pci_find_next_ext_capability(pdev->sbdf, pos,
+ PCI_EXT_CAP_ID_VNDR);
}
ff = 0;
}
return 0;
ats_drhd = find_ats_dev_drhd(drhd->iommu);
- pos = pci_find_ext_capability(pdev->sbdf.seg, pdev->sbdf.bus,
- pdev->sbdf.extfunc, PCI_EXT_CAP_ID_ATS);
+ pos = pci_find_ext_capability(pdev->sbdf, PCI_EXT_CAP_ID_ATS);
if ( pos && (ats_drhd == NULL) )
{
int enable_ats_device(struct pci_dev *pdev, struct list_head *ats_list)
{
u32 value;
- uint16_t seg = pdev->sbdf.seg;
- uint16_t bus = pdev->sbdf.bus, devfn = pdev->sbdf.extfunc;
int pos;
- pos = pci_find_ext_capability(seg, bus, devfn, PCI_EXT_CAP_ID_ATS);
+ pos = pci_find_ext_capability(pdev->sbdf, PCI_EXT_CAP_ID_ATS);
BUG_ON(!pos);
if ( iommu_verbose )
#include <xen/pci.h>
#include <xen/pci_regs.h>
-int pci_find_cap_offset(u16 seg, u8 bus, u8 dev, u8 func, u8 cap)
+int pci_find_cap_offset(pci_sbdf_t sbdf, unsigned int cap)
{
u8 id;
int max_cap = 48;
u8 pos = PCI_CAPABILITY_LIST;
u16 status;
- const pci_sbdf_t sbdf = {
- .seg = seg,
- .bus = bus,
- .dev = dev,
- .func = func,
- };
status = pci_conf_read16(sbdf, PCI_STATUS);
if ( (status & PCI_STATUS_CAP_LIST) == 0 )
return 0;
}
-int pci_find_next_cap(u16 seg, u8 bus, unsigned int devfn, u8 pos, int cap)
+int pci_find_next_cap(pci_sbdf_t sbdf, unsigned int pos, unsigned int cap)
{
u8 id;
int ttl = 48;
- const pci_sbdf_t sbdf = {
- .seg = seg,
- .bus = bus,
- .extfunc = devfn,
- };
while ( ttl-- )
{
* within the device's PCI configuration space or 0 if the device does
* not support it.
*/
-int pci_find_ext_capability(int seg, int bus, int devfn, int cap)
+int pci_find_ext_capability(pci_sbdf_t sbdf, unsigned int cap)
{
- return pci_find_next_ext_capability(seg, bus, devfn, 0, cap);
+ return pci_find_next_ext_capability(sbdf, 0, cap);
}
/**
* within the device's PCI configuration space or 0 if the device does
* not support it.
*/
-int pci_find_next_ext_capability(int seg, int bus, int devfn, int start, int cap)
+int pci_find_next_ext_capability(pci_sbdf_t sbdf, unsigned int start,
+ unsigned int cap)
{
- int ttl = 480; /* 3840 bytes, minimum 8 bytes per capability */
- int pos = max(start, 0x100);
- const pci_sbdf_t sbdf = {
- .seg = seg,
- .bus = bus,
- .extfunc = devfn,
- };
+ unsigned int ttl = 480; /* 3840 bytes, minimum 8 bytes per capability */
+ unsigned int pos = max(start, 0x100u);
uint32_t header = pci_conf_read32(sbdf, pos);
/*
static int init_msi(struct pci_dev *pdev)
{
- unsigned int pos = pci_find_cap_offset(pdev->sbdf.seg, pdev->sbdf.bus,
- pdev->sbdf.dev, pdev->sbdf.func,
- PCI_CAP_ID_MSI);
+ unsigned int pos = pci_find_cap_offset(pdev->sbdf, PCI_CAP_ID_MSI);
uint16_t control;
int ret;
uint16_t control;
int rc;
- msix_offset = pci_find_cap_offset(pdev->sbdf.seg, pdev->sbdf.bus,
- pdev->sbdf.dev, pdev->sbdf.func,
- PCI_CAP_ID_MSIX);
+ msix_offset = pci_find_cap_offset(pdev->sbdf, PCI_CAP_ID_MSIX);
if ( !msix_offset )
return 0;
unsigned int devfn, int reg, int len, u32 *value);
int pci_mmcfg_write(unsigned int seg, unsigned int bus,
unsigned int devfn, int reg, int len, u32 value);
-int pci_find_cap_offset(u16 seg, u8 bus, u8 dev, u8 func, u8 cap);
-int pci_find_next_cap(u16 seg, u8 bus, unsigned int devfn, u8 pos, int cap);
-int pci_find_ext_capability(int seg, int bus, int devfn, int cap);
-int pci_find_next_ext_capability(int seg, int bus, int devfn, int pos, int cap);
+int pci_find_cap_offset(pci_sbdf_t sbdf, unsigned int cap);
+int pci_find_next_cap(pci_sbdf_t sbdf, unsigned int pos, unsigned int cap);
+int pci_find_ext_capability(pci_sbdf_t sbdf, unsigned int cap);
+int pci_find_next_ext_capability(pci_sbdf_t sbdf, unsigned int pos,
+ unsigned int cap);
const char *parse_pci(const char *, unsigned int *seg, unsigned int *bus,
unsigned int *dev, unsigned int *func);
const char *parse_pci_seg(const char *, unsigned int *seg, unsigned int *bus,