lmsw is an obsolete relic of the 286 processor - so much so that it even lacks
intercept assistance on AMD processors.
Use a plain mov to %cr0 which is easier to follow, certainly faster to
virtualise on AMD hardware, and almost certainly a faster microcode path in
real hardware.
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
---
CC: Jan Beulich <JBeulich@suse.com>
CC: Wei Liu <wl@xen.org>
CC: Roger Pau Monné <roger.pau@citrix.com>
lidt trampsym(idt_48)
lgdtl trampsym(gdt_48)
mov $1,%bl # EBX != 0 indicates we are an AP
- xor %ax, %ax
- inc %ax
- lmsw %ax # CR0.PE = 1 (enter protected mode)
+
+ mov $X86_CR0_PE, %eax
+ mov %eax, %cr0
+
ljmpl $BOOT_CS32,$tramp32sym_rel(trampoline_protmode_entry,6)
.code32
lgdtl bootsym(boot16_gdt)
/* Enter protected mode, and flush insn queue. */
- xor %ax,%ax
- inc %ax
- lmsw %ax # CR0.PE = 1 (enter protected mode)
+ mov $X86_CR0_PE, %eax
+ mov %eax, %cr0
/* Load proper protected-mode values into all segment registers. */
ljmpl $BOOT_CS32,$bootsym_rel(1f,6)
lidt wakesym(idt_48)
lgdt wakesym(gdt_48)
- movw $1, %ax
- lmsw %ax # Turn on CR0.PE
+ mov $X86_CR0_PE, %eax
+ mov %eax, %cr0
+
ljmpl $BOOT_CS32, $trampsym_rel(wakeup_32, 6)
/* This code uses an extended set of video mode numbers. These include: