]> xenbits.xensource.com Git - people/liuw/qemu.git/commitdiff
serial: refine serial_thr_ipending_needed
authorPaolo Bonzini <pbonzini@redhat.com>
Mon, 22 Dec 2014 07:51:57 +0000 (08:51 +0100)
committerMichael Roth <mdroth@linux.vnet.ibm.com>
Mon, 23 Feb 2015 00:06:01 +0000 (18:06 -0600)
If the THR interrupt is disabled, there is no need to migrate thr_ipending
because LSR.THRE will be sampled again when the interrupt is enabled.
(This is the behavior that is not documented in the datasheet, but
relied on by Windows!)

Note that in this case IIR will never be 0x2 so, if thr_ipending were
to be one, QEMU would produce the subsection.

Reported-by: Igor Mammedov <imammedo@redhat.com>
Cc: qemu-stable@nongnu.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
(cherry picked from commit bfa7362889d05d6951493d1c298289b39cf9bf86)
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
hw/char/serial.c

index 8c42d03faf340b68bfcce75646e5d5498587987d..51d939e5301c415b480b9fad5961da5d793b9b87 100644 (file)
@@ -637,8 +637,17 @@ static int serial_post_load(void *opaque, int version_id)
 static bool serial_thr_ipending_needed(void *opaque)
 {
     SerialState *s = opaque;
-    bool expected_value = ((s->iir & UART_IIR_ID) == UART_IIR_THRI);
-    return s->thr_ipending != expected_value;
+
+    if (s->ier & UART_IER_THRI) {
+        bool expected_value = ((s->iir & UART_IIR_ID) == UART_IIR_THRI);
+        return s->thr_ipending != expected_value;
+    } else {
+        /* LSR.THRE will be sampled again when the interrupt is
+         * enabled.  thr_ipending is not used in this case, do
+         * not migrate it.
+         */
+        return false;
+    }
 }
 
 const VMStateDescription vmstate_serial_thr_ipending = {