#include <xen/delay.h>
#include <xen/smp.h>
#include <xen/softirq.h>
+
+#include <asm/irq-vectors.h>
#include <asm/mc146818rtc.h>
#include <asm/microcode.h>
#include <asm/msr.h>
#include <asm/genapic.h>
#include <io_ports.h>
-#include <irq_vectors.h>
#include <xen/kexec.h>
#include <asm/guest.h>
#include <asm/nmi.h>
#include <xen/guest_access.h>
#include <xen/hypercall.h>
#include <xen/sched.h>
+
+#include <asm/irq-vectors.h>
#include <asm/regs.h>
#include <asm/msr.h>
#include <asm/nmi.h>
#include <asm/p2m.h>
#include <asm/vpmu.h>
#include <asm/apic.h>
-#include <irq_vectors.h>
+
#include <public/pmu.h>
#include <xsm/xsm.h>
#include <xen/delay.h>
#include <asm/apic.h>
#include <asm/asm_defns.h>
+#include <asm/irq-vectors.h>
#include <asm/setup.h>
#include <io_ports.h>
-#include <irq_vectors.h>
/*
* This is the 'legacy' 8259A Programmable Interrupt Controller,
--- /dev/null
+#ifndef _ASM_IRQ_VECTORS_H
+#define _ASM_IRQ_VECTORS_H
+
+/* Processor-initiated interrupts are all high priority. */
+#define SPURIOUS_APIC_VECTOR 0xff
+#define ERROR_APIC_VECTOR 0xfe
+#define INVALIDATE_TLB_VECTOR 0xfd
+#define EVENT_CHECK_VECTOR 0xfc
+#define CALL_FUNCTION_VECTOR 0xfb
+#define LOCAL_TIMER_VECTOR 0xfa
+#define PMU_APIC_VECTOR 0xf9
+/*
+ * High-priority dynamically-allocated vectors. For interrupts that
+ * must be higher priority than any guest-bound interrupt.
+ */
+#define FIRST_HIPRIORITY_VECTOR 0xf1
+#define LAST_HIPRIORITY_VECTOR 0xf8
+/* IRQ0 (timer) is statically allocated but must be high priority. */
+#define IRQ0_VECTOR 0xf0
+
+/* Legacy PIC uses vectors 0x20-0x2f. */
+#define FIRST_LEGACY_VECTOR FIRST_DYNAMIC_VECTOR
+#define LAST_LEGACY_VECTOR (FIRST_LEGACY_VECTOR + 0xf)
+
+#ifdef CONFIG_PV32
+#define HYPERCALL_VECTOR 0x82
+#endif
+
+#define LEGACY_SYSCALL_VECTOR 0x80
+
+/*
+ * Dynamically-allocated vectors available to any driver. Note that the
+ * legacy vector range is a sub-range of this one, re-used on CPUs not
+ * sharing vectors with CPU 0.
+ */
+#define FIRST_DYNAMIC_VECTOR 0x20
+#define LAST_DYNAMIC_VECTOR 0xef
+#define NR_DYNAMIC_VECTORS (LAST_DYNAMIC_VECTOR - FIRST_DYNAMIC_VECTOR + 1)
+
+/* There's no IRQ2 at the PIC. */
+#define IRQ_MOVE_CLEANUP_VECTOR (FIRST_LEGACY_VECTOR + 2)
+
+#define FIRST_IRQ_VECTOR FIRST_DYNAMIC_VECTOR
+#define LAST_IRQ_VECTOR LAST_HIPRIORITY_VECTOR
+
+#endif /* _ASM_IRQ_VECTORS_H */
+++ /dev/null
-#ifndef _ASM_IRQ_VECTORS_H
-#define _ASM_IRQ_VECTORS_H
-
-/* Processor-initiated interrupts are all high priority. */
-#define SPURIOUS_APIC_VECTOR 0xff
-#define ERROR_APIC_VECTOR 0xfe
-#define INVALIDATE_TLB_VECTOR 0xfd
-#define EVENT_CHECK_VECTOR 0xfc
-#define CALL_FUNCTION_VECTOR 0xfb
-#define LOCAL_TIMER_VECTOR 0xfa
-#define PMU_APIC_VECTOR 0xf9
-/*
- * High-priority dynamically-allocated vectors. For interrupts that
- * must be higher priority than any guest-bound interrupt.
- */
-#define FIRST_HIPRIORITY_VECTOR 0xf1
-#define LAST_HIPRIORITY_VECTOR 0xf8
-/* IRQ0 (timer) is statically allocated but must be high priority. */
-#define IRQ0_VECTOR 0xf0
-
-/* Legacy PIC uses vectors 0x20-0x2f. */
-#define FIRST_LEGACY_VECTOR FIRST_DYNAMIC_VECTOR
-#define LAST_LEGACY_VECTOR (FIRST_LEGACY_VECTOR + 0xf)
-
-#ifdef CONFIG_PV32
-#define HYPERCALL_VECTOR 0x82
-#endif
-
-#define LEGACY_SYSCALL_VECTOR 0x80
-
-/*
- * Dynamically-allocated vectors available to any driver. Note that the
- * legacy vector range is a sub-range of this one, re-used on CPUs not
- * sharing vectors with CPU 0.
- */
-#define FIRST_DYNAMIC_VECTOR 0x20
-#define LAST_DYNAMIC_VECTOR 0xef
-#define NR_DYNAMIC_VECTORS (LAST_DYNAMIC_VECTOR - FIRST_DYNAMIC_VECTOR + 1)
-
-/* There's no IRQ2 at the PIC. */
-#define IRQ_MOVE_CLEANUP_VECTOR (FIRST_LEGACY_VECTOR + 2)
-
-#define FIRST_IRQ_VECTOR FIRST_DYNAMIC_VECTOR
-#define LAST_IRQ_VECTOR LAST_HIPRIORITY_VECTOR
-
-#endif /* _ASM_IRQ_VECTORS_H */
#include <asm/genapic.h>
#include <asm/hpet.h>
#include <asm/io_apic.h>
+#include <asm/irq-vectors.h>
#include <asm/mc146818rtc.h>
#include <asm/smp.h>
#include <asm/desc.h>
#include <asm/setup.h>
#include <io_ports.h>
-#include <irq_vectors.h>
#include <public/physdev.h>
#include <xen/trace.h>
#include <asm/apic.h>
#include <asm/genapic.h>
#include <asm/io_apic.h>
+#include <asm/irq-vectors.h>
#include <asm/msi.h>
#include <asm/current.h>
#include <asm/flushtlb.h>
-#include <irq_vectors.h>
#include <public/physdev.h>
/* opt_noirqbalance: If true, software IRQ balancing/affinity is disabled. */
#include <asm/genapic.h>
#include <asm/io.h>
#include <asm/io_apic.h>
+#include <asm/irq-vectors.h>
#include <asm/smp.h>
#include <asm/desc.h>
#include <asm/msi.h>
#include <asm/p2m.h>
#include <io_ports.h>
-#include <irq_vectors.h>
#include <public/physdev.h>
#include <xen/iommu.h>
#include <xsm/xsm.h>
#include <xen/hypercall.h>
#include <xen/nospec.h>
#include <xen/trace.h>
+
#include <asm/apic.h>
+#include <asm/irq-vectors.h>
#include <asm/multicall.h>
-#include <irq_vectors.h>
/* Forced inline to cause 'compat' to be evaluated at compile time. */
static void always_inline
#include <xen/softirq.h>
#include <asm/debugreg.h>
+#include <asm/irq-vectors.h>
#include <asm/pv/trace.h>
#include <asm/shared.h>
#include <asm/traps.h>
-#include <irq_vectors.h>
void pv_inject_event(const struct x86_event *event)
{
#include <asm/current.h>
#include <asm/genapic.h>
#include <asm/guest.h>
+#include <asm/irq-vectors.h>
#include <asm/smp.h>
#include <asm/mc146818rtc.h>
#include <asm/flushtlb.h>
#include <asm/hardirq.h>
#include <asm/hpet.h>
#include <asm/setup.h>
-#include <irq_vectors.h>
/* Helper functions to prepare APIC register values. */
static unsigned int prepare_ICR(unsigned int shortcut, int vector)
#include <asm/time.h>
#include <asm/tboot.h>
#include <asm/trampoline.h>
-#include <irq_vectors.h>
+#include <asm/irq-vectors.h>
unsigned long __read_mostly trampoline_phys;
enum ap_boot_method __read_mostly ap_boot_method = AP_BOOT_NORMAL;
#include <public/hvm/params.h>
#include <asm/cpuid.h>
#include <xsm/xsm.h>
-#include <asm/mach-default/irq_vectors.h>
+#include <asm/irq-vectors.h>
#include <asm/pv/traps.h>
#include <asm/pv/trace.h>
#include <asm/pv/mm.h>
.file "x86_64/compat/entry.S"
#include <asm/asm_defns.h>
+#include <asm/irq-vectors.h>
#include <asm/page.h>
#include <asm/processor.h>
#include <asm/desc.h>
#include <public/xen.h>
-#include <irq_vectors.h>
FUNC(entry_int82)
ENDBR64
.file "x86_64/entry.S"
#include <asm/asm_defns.h>
+#include <asm/irq-vectors.h>
#include <asm/page.h>
#include <asm/processor.h>
#include <public/xen.h>
-#include <irq_vectors.h>
/* %rsp: struct cpu_user_regs */
.macro ASSERT_CONTEXT_IS_XEN