Add suport for invariant TSC flag (CPUID 0x80000007, bit 8 of EDX).
If this flag is enabled, the TSC ticks at a constant rate across
all ACPI P-, C- and T-states.
This can be enabled by adding:
<feature name='invtsc'/>
to the <cpu> element.
Migration and saving the domain does not work with this flag.
QEMU support: http://git.qemu.org/?p=qemu.git;a=commitdiff;h=
303752a
The feature name "invtsc" differs from the name "" used by the linux kernel:
https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/arch/x86/kernel/cpu/powerflags.c?id=
30321c7b#n18
<cpuid function='0x00000007' ebx='0x00100000'/>
</feature>
+ <!-- Advanced Power Management edx features -->
+ <feature name='invtsc'>
+ <cpuid function='0x80000007' edx='0x00000100'/>
+ </feature>
+
<!-- models -->
<model name='486'>
<feature name='fpu'/>
return false;
}
+ for (i = 0; i < def->cpu->nfeatures; i++) {
+ virCPUFeatureDefPtr feature = &def->cpu->features[i];
+
+ if (feature->policy != VIR_CPU_FEATURE_REQUIRE)
+ continue;
+
+ /* QEMU blocks migration and save with invariant TSC enabled */
+ if (STREQ(feature->name, "invtsc")) {
+ virReportError(VIR_ERR_OPERATION_INVALID,
+ _("domain has CPU feature: %s"),
+ feature->name);
+ return false;
+ }
+ }
+
return true;
}
qemuDomainObjPrivatePtr priv = vm->privateData;
int rc;
bool ret = false;
+ size_t i;
switch (arch) {
case VIR_ARCH_I686:
goto cleanup;
}
}
+
+ for (i = 0; i < def->cpu->nfeatures; i++) {
+ virCPUFeatureDefPtr feature = &def->cpu->features[i];
+
+ if (feature->policy != VIR_CPU_FEATURE_REQUIRE)
+ continue;
+
+ if (STREQ(feature->name, "invtsc") &&
+ !cpuHasFeature(guestcpu, feature->name)) {
+ virReportError(VIR_ERR_CONFIG_UNSUPPORTED, "%s",
+ _("host doesn't support invariant TSC"));
+ goto cleanup;
+ }
+ }
break;
default: