--- /dev/null
+../../../virhostcpudata/linux-with-clusters/cpu
\ No newline at end of file
--- /dev/null
+../../../virhostcpudata/linux-with-clusters/node
\ No newline at end of file
--- /dev/null
+<capabilities>
+
+ <host>
+ <cpu>
+ <arch>aarch64</arch>
+ </cpu>
+ <power_management/>
+ <iommu support='no'/>
+ <topology>
+ <cells num='2'>
+ <cell id='0'>
+ <memory unit='KiB'>1048576</memory>
+ <pages unit='KiB' size='4'>2048</pages>
+ <pages unit='KiB' size='2048'>4096</pages>
+ <pages unit='KiB' size='1048576'>6144</pages>
+ <cpus num='4'>
+ <cpu id='0' socket_id='36' die_id='0' core_id='0' siblings='0-1'/>
+ <cpu id='1' socket_id='36' die_id='0' core_id='0' siblings='0-1'/>
+ <cpu id='2' socket_id='36' die_id='0' core_id='1' siblings='2-3'/>
+ <cpu id='3' socket_id='36' die_id='0' core_id='1' siblings='2-3'/>
+ </cpus>
+ </cell>
+ <cell id='1'>
+ <memory unit='KiB'>2097152</memory>
+ <pages unit='KiB' size='4'>4096</pages>
+ <pages unit='KiB' size='2048'>6144</pages>
+ <pages unit='KiB' size='1048576'>8192</pages>
+ <cpus num='4'>
+ <cpu id='4' socket_id='3180' die_id='0' core_id='256' siblings='4-5'/>
+ <cpu id='5' socket_id='3180' die_id='0' core_id='256' siblings='4-5'/>
+ <cpu id='6' socket_id='3180' die_id='0' core_id='257' siblings='6-7'/>
+ <cpu id='7' socket_id='3180' die_id='0' core_id='257' siblings='6-7'/>
+ </cpus>
+ </cell>
+ </cells>
+ </topology>
+ </host>
+
+</capabilities>
DO_TEST_FULL("basic", VIR_ARCH_X86_64, false, false);
DO_TEST_FULL("basic", VIR_ARCH_AARCH64, true, false);
DO_TEST_FULL("basic-dies", VIR_ARCH_X86_64, false, false);
+ DO_TEST_FULL("basic-clusters", VIR_ARCH_AARCH64, false, false);
DO_TEST_FULL("caches", VIR_ARCH_X86_64, true, true);
--- /dev/null
+processor : 0
+BogoMIPS : 400.00
+Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics cpuid asimdrdm
+CPU implementer : 0x43
+CPU architecture: 8
+CPU variant : 0x1
+CPU part : 0x0af
+CPU revision : 1
+
+processor : 1
+BogoMIPS : 400.00
+Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics cpuid asimdrdm
+CPU implementer : 0x43
+CPU architecture: 8
+CPU variant : 0x1
+CPU part : 0x0af
+CPU revision : 1
+
+processor : 2
+BogoMIPS : 400.00
+Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics cpuid asimdrdm
+CPU implementer : 0x43
+CPU architecture: 8
+CPU variant : 0x1
+CPU part : 0x0af
+CPU revision : 1
+
+processor : 3
+BogoMIPS : 400.00
+Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics cpuid asimdrdm
+CPU implementer : 0x43
+CPU architecture: 8
+CPU variant : 0x1
+CPU part : 0x0af
+CPU revision : 1
+
+processor : 4
+BogoMIPS : 400.00
+Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics cpuid asimdrdm
+CPU implementer : 0x43
+CPU architecture: 8
+CPU variant : 0x1
+CPU part : 0x0af
+CPU revision : 1
+
+processor : 5
+BogoMIPS : 400.00
+Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics cpuid asimdrdm
+CPU implementer : 0x43
+CPU architecture: 8
+CPU variant : 0x1
+CPU part : 0x0af
+CPU revision : 1
+
+processor : 6
+BogoMIPS : 400.00
+Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics cpuid asimdrdm
+CPU implementer : 0x43
+CPU architecture: 8
+CPU variant : 0x1
+CPU part : 0x0af
+CPU revision : 1
+
+processor : 7
+BogoMIPS : 400.00
+Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics cpuid asimdrdm
+CPU implementer : 0x43
+CPU architecture: 8
+CPU variant : 0x1
+CPU part : 0x0af
+CPU revision : 1
+
--- /dev/null
+CPUs: 8/8, MHz: 0, Nodes: 2, Sockets: 1, Cores: 2, Threads: 2
--- /dev/null
+../../cpu/cpu0
\ No newline at end of file
--- /dev/null
+../../cpu/cpu1
\ No newline at end of file
--- /dev/null
+../../cpu/cpu2
\ No newline at end of file
--- /dev/null
+../../cpu/cpu3
\ No newline at end of file
--- /dev/null
+../../cpu/cpu4
\ No newline at end of file
--- /dev/null
+../../cpu/cpu5
\ No newline at end of file
--- /dev/null
+../../cpu/cpu6
\ No newline at end of file
--- /dev/null
+../../cpu/cpu7
\ No newline at end of file
{"subcores3", VIR_ARCH_PPC64},
{"with-frequency", VIR_ARCH_S390X},
{"with-die", VIR_ARCH_X86_64},
+ {"with-clusters", VIR_ARCH_AARCH64},
};
if (virInitialize() < 0)