]> xenbits.xensource.com Git - xen.git/commitdiff
xen/arm: introduce GIC_PRI_TO_GUEST macro
authorStefano Stabellini <stefano.stabellini@eu.citrix.com>
Tue, 10 Jun 2014 14:07:19 +0000 (15:07 +0100)
committerIan Campbell <ian.campbell@citrix.com>
Wed, 18 Jun 2014 10:32:10 +0000 (11:32 +0100)
GICH_LR registers and GICH_VMCR only support 5 bits for guest irq
priorities.
Introduce a macro to reduce the 8-bit priority fields to 5 bits; use it
in gic.c.

Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
xen/arch/arm/gic.c
xen/include/asm-arm/gic.h

index 88c2fd3a052889d43a64f7e98b578b7c298a7c32..4d044cf0b7a39a1b6d9867cc178d2e213470b6f3 100644 (file)
@@ -561,7 +561,7 @@ static inline void gic_set_lr(int lr, struct pending_irq *p,
     BUG_ON(lr < 0);
     BUG_ON(state & ~(GICH_LR_STATE_MASK<<GICH_LR_STATE_SHIFT));
 
-    lr_val = state | ((p->priority >> 3) << GICH_LR_PRIORITY_SHIFT) |
+    lr_val = state | (GIC_PRI_TO_GUEST(p->priority) << GICH_LR_PRIORITY_SHIFT) |
         ((p->irq & GICH_LR_VIRTUAL_MASK) << GICH_LR_VIRTUAL_SHIFT);
     if ( p->desc != NULL )
         lr_val |= GICH_LR_HW | (p->desc->irq << GICH_LR_PHYSICAL_SHIFT);
index 3c4d14e8b6a8765a5903a62d54ad514e6b6d65dc..a14cd5e257b9955cc73d5514869d24913c659683 100644 (file)
 #define GIC_PRI_IRQ        0xa0
 #define GIC_PRI_IPI        0x90 /* IPIs must preempt normal interrupts */
 #define GIC_PRI_HIGHEST    0x80 /* Higher priorities belong to Secure-World */
+#define GIC_PRI_TO_GUEST(pri) (pri >> 3) /* GICH_LR and GICH_VMCR only support
+                                            5 bits for guest irq priority */
 
 
 #ifndef __ASSEMBLY__