]> xenbits.xensource.com Git - libvirt.git/commitdiff
schema: Add microcode element to capability grammar
authorJohn Ferlan <jferlan@redhat.com>
Sat, 19 May 2018 10:47:27 +0000 (06:47 -0400)
committerJohn Ferlan <jferlan@redhat.com>
Fri, 25 May 2018 13:36:32 +0000 (09:36 -0400)
https://bugzilla.redhat.com/show_bug.cgi?id=1572491

Commit id 'd2440f3b5' added printing the <microcode> for the
capabilities, but didn't update the capabilities schema.

While at it, update capabilityschemadata for caps-test2
and caps-test3 to output some value for validation.

Signed-off-by: John Ferlan <jferlan@redhat.com>
ACKed-by Michal Privoznik <mprivozn@redhat.com>

docs/schemas/capability.rng
tests/capabilityschemadata/caps-test2.xml
tests/capabilityschemadata/caps-test3.xml

index c532f5dcc7cd31b18d28247e6041a3953f85d8b8..e1b7858540d6239adf64e24008ddcc698e43d923 100644 (file)
         <text/>
       </element>
     </optional>
+    <optional>
+      <element name='microcode'>
+        <attribute name='version'>
+          <ref name='positiveInteger'/>
+        </attribute>
+      </element>
+    </optional>
     <element name='topology'>
       <attribute name='sockets'>
         <ref name='positiveInteger'/>
index 6a45e4569b8a2f656a1bc5374d45f7835f38109a..652fc71e0b82e076cdd650d68fa42b5d01570051 100644 (file)
@@ -5,6 +5,7 @@
       <arch>x86_64</arch>
       <model>SandyBridge</model>
       <vendor>Intel</vendor>
+      <microcode version='36'/>
       <topology sockets='1' cores='2' threads='2'/>
       <feature name='osxsave'/>
       <feature name='pdcm'/>
index 7e21f850488a531a2e385a12f7532db04868cf2a..479db30612ae92e88ce929912da2299c463bc8b6 100644 (file)
@@ -6,6 +6,7 @@
       <arch>x86_64</arch>
       <model>Westmere</model>
       <vendor>Intel</vendor>
+      <microcode version='36'/>
       <topology sockets='1' cores='6' threads='2'/>
       <feature name='rdtscp'/>
       <feature name='pdpe1gb'/>