register_keyhandler('v', vmcb_dump, "dump AMD-V VMCBs", 1);
}
+static void __init __maybe_unused build_assertions(void)
+{
+ struct segment_register sreg;
+
+ /* Check struct segment_register against the VMCB segment layout. */
+ BUILD_BUG_ON(sizeof(sreg) != 16);
+ BUILD_BUG_ON(sizeof(sreg.sel) != 2);
+ BUILD_BUG_ON(sizeof(sreg.attr) != 2);
+ BUILD_BUG_ON(sizeof(sreg.limit) != 4);
+ BUILD_BUG_ON(sizeof(sreg.base) != 8);
+ BUILD_BUG_ON(offsetof(struct segment_register, sel) != 0);
+ BUILD_BUG_ON(offsetof(struct segment_register, attr) != 2);
+ BUILD_BUG_ON(offsetof(struct segment_register, limit) != 4);
+ BUILD_BUG_ON(offsetof(struct segment_register, base) != 8);
+}
+
/*
* Local variables:
* mode: C
GENERAL1_INTERCEPT_SMI = 1 << 2,
GENERAL1_INTERCEPT_INIT = 1 << 3,
GENERAL1_INTERCEPT_VINTR = 1 << 4,
- GENERAL1_INTERCEPT_CR0_SEL_WRITE = 1 << 5,
+ GENERAL1_INTERCEPT_CR0_SEL_WRITE = 1 << 5,
GENERAL1_INTERCEPT_IDTR_READ = 1 << 6,
GENERAL1_INTERCEPT_GDTR_READ = 1 << 7,
GENERAL1_INTERCEPT_LDTR_READ = 1 << 8,
VMEXIT_INVALID = -1
};
-/* Definition of segment state is borrowed by the generic HVM code. */
-typedef struct segment_register svm_segment_register_t;
-
typedef union
{
u64 bytes;
- struct
+ struct
{
u64 vector: 8;
u64 type: 3;
typedef union
{
u64 bytes;
- struct
+ struct
{
u64 tpr: 8;
u64 irq: 1;
typedef union
{
u64 bytes;
- struct
+ struct
{
u64 type: 1;
u64 rsv0: 1;
u8 guest_ins[15]; /* offset 0xD1 */
u64 res10a[100]; /* offset 0xE0 pad to save area */
- svm_segment_register_t es; /* offset 1024 - cleanbit 8 */
- svm_segment_register_t cs; /* cleanbit 8 */
- svm_segment_register_t ss; /* cleanbit 8 */
- svm_segment_register_t ds; /* cleanbit 8 */
- svm_segment_register_t fs;
- svm_segment_register_t gs;
- svm_segment_register_t gdtr; /* cleanbit 7 */
- svm_segment_register_t ldtr;
- svm_segment_register_t idtr; /* cleanbit 7 */
- svm_segment_register_t tr;
+ struct segment_register es; /* offset 0x400 - cleanbit 8 */
+ struct segment_register cs; /* cleanbit 8 */
+ struct segment_register ss; /* cleanbit 8 */
+ struct segment_register ds; /* cleanbit 8 */
+ struct segment_register fs;
+ struct segment_register gs;
+ struct segment_register gdtr; /* cleanbit 7 */
+ struct segment_register ldtr;
+ struct segment_register idtr; /* cleanbit 7 */
+ struct segment_register tr;
u64 res10[5];
u8 res11[3];
u8 _cpl; /* cleanbit 8 */
u32 res12;
- u64 _efer; /* offset 1024 + 0xD0 - cleanbit 5 */
+ u64 _efer; /* offset 0x400 + 0xD0 - cleanbit 5 */
u64 res13[14];
- u64 _cr4; /* offset 1024 + 0x148 - cleanbit 5 */
+ u64 _cr4; /* offset 0x400 + 0x148 - cleanbit 5 */
u64 _cr3; /* cleanbit 5 */
u64 _cr0; /* cleanbit 5 */
u64 _dr7; /* cleanbit 6 */
uint64_t guest_sysenter_cs;
uint64_t guest_sysenter_esp;
uint64_t guest_sysenter_eip;
-
+
/* AMD lightweight profiling MSR */
uint64_t guest_lwp_cfg; /* guest version */
uint64_t cpu_lwp_cfg; /* CPU version */