{
#if defined(__x86_64__)
asm volatile("movl %0,%%fs ; movl %0,%%gs" :: "r" (0));
- wrmsrl(0xc0000101, &cpu0_pda); /* 0xc0000101 is MSR_GS_BASE */
+ wrmsrl(0xc0000101, (uint64_t)&cpu0_pda); /* 0xc0000101 is MSR_GS_BASE */
cpu0_pda.irqcount = -1;
cpu0_pda.irqstackptr = (void*) (((unsigned long)irqstack + 2 * STACK_SIZE)
& ~(STACK_SIZE - 1));
void arch_fini_events(void)
{
#if defined(__x86_64__)
- wrmsrl(0xc0000101, NULL); /* 0xc0000101 is MSR_GS_BASE */
+ wrmsrl(0xc0000101, 0); /* 0xc0000101 is MSR_GS_BASE */
#endif
}
#include <mini-os/lib.h> /* for printk, memcpy */
#include <mini-os/kernel.h>
#include <xen/xen.h>
+#include <xen/arch-x86/cpuid.h>
/*
* Shared page for communicating with the hypervisor.
#define sse_init()
#endif
+#ifdef CONFIG_PARAVIRT
+#define hpc_init()
+#else
+static void hpc_init(void)
+{
+ uint32_t eax, ebx, ecx, edx, base;
+
+ for ( base = XEN_CPUID_FIRST_LEAF;
+ base < XEN_CPUID_FIRST_LEAF + 0x10000; base += 0x100 )
+ {
+ cpuid(base, &eax, &ebx, &ecx, &edx);
+
+ if ( (ebx == XEN_CPUID_SIGNATURE_EBX) &&
+ (ecx == XEN_CPUID_SIGNATURE_ECX) &&
+ (edx == XEN_CPUID_SIGNATURE_EDX) &&
+ ((eax - base) >= 2) )
+ break;
+ }
+
+ cpuid(base + 2, &eax, &ebx, &ecx, &edx);
+ wrmsrl(ebx, (unsigned long)&hypercall_page);
+ barrier();
+}
+#endif
/*
* INITIAL C ENTRY POINT.
static char hello[] = "Bootstrapping...\n";
start_info_t *si;
+ hpc_init();
(void)HYPERVISOR_console_io(CONSOLEIO_write, strlen(hello), hello);
trap_init();
(val) = ((unsigned long)__a) | (((unsigned long)__d)<<32); \
} while(0)
-#define wrmsr(msr,val1,val2) \
- __asm__ __volatile__("wrmsr" \
- : /* no outputs */ \
- : "c" (msr), "a" (val1), "d" (val2))
-
-#define wrmsrl(msr,val) wrmsr(msr,(uint32_t)((uint64_t)(val)),((uint64_t)(val))>>32)
-
-
#else /* ifdef __x86_64__ */
#error "Unsupported architecture"
#endif
+
#endif /* ifdef __INSIDE_MINIOS */
/********************* common i386 and x86_64 ****************************/
+#define wrmsr(msr,val1,val2) \
+ __asm__ __volatile__("wrmsr" \
+ : /* no outputs */ \
+ : "c" (msr), "a" (val1), "d" (val2))
+
+static inline void wrmsrl(unsigned msr, uint64_t val)
+{
+ wrmsr(msr, (uint32_t)(val & 0xffffffffULL), (uint32_t)(val >> 32));
+}
+
struct __synch_xchg_dummy { unsigned long a[100]; };
#define __synch_xg(x) ((struct __synch_xchg_dummy *)(x))
return _hypercall1(int, xsm_op, op);
}
+static inline void cpuid(uint32_t leaf,
+ uint32_t *eax, uint32_t *ebx,
+ uint32_t *ecx, uint32_t *edx)
+{
+ asm volatile ("cpuid"
+ : "=a" (*eax), "=b" (*ebx), "=c" (*ecx), "=d" (*edx)
+ : "0" (leaf));
+}
+
#undef ADDR
#endif /* not assembly */