]> xenbits.xensource.com Git - xen.git/commitdiff
xen: enable APIC-Register Virtualization
authorJiongxi Li <jiongxi.li@intel.com>
Mon, 17 Sep 2012 20:04:08 +0000 (21:04 +0100)
committerJiongxi Li <jiongxi.li@intel.com>
Mon, 17 Sep 2012 20:04:08 +0000 (21:04 +0100)
Add APIC register virtualization support
 - APIC read doesn't cause VM-Exit
 - APIC write becomes trap-like

Signed-off-by: Gang Wei <gang.wei@intel.com>
Signed-off-by: Yang Zhang <yang.z.zhang@intel.com>
Signed-off-by: Jiongxi Li <jiongxi.li@intel.com>
xen/arch/x86/hvm/vlapic.c
xen/arch/x86/hvm/vmx/vmcs.c
xen/arch/x86/hvm/vmx/vmx.c
xen/include/asm-x86/hvm/vlapic.h
xen/include/asm-x86/hvm/vmx/vmcs.h
xen/include/asm-x86/hvm/vmx/vmx.h

index 8a7b362cbba5d2eced12045c46e7168bd0d85663..7db835b201aa9b7097af90e7b63c941a67a97ee5 100644 (file)
@@ -823,6 +823,14 @@ static int vlapic_write(struct vcpu *v, unsigned long address,
     return rc;
 }
 
+int vlapic_apicv_write(struct vcpu *v, unsigned int offset)
+{
+    uint32_t val = vlapic_get_reg(vcpu_vlapic(v), offset);
+
+    vlapic_reg_write(v, offset, val);
+    return 0;
+}
+
 int hvm_x2apic_msr_write(struct vcpu *v, unsigned int msr, uint64_t msr_content)
 {
     struct vlapic *vlapic = vcpu_vlapic(v);
index e259889b2c00661a272f237c9b7eb7be97120299..e0fb8adcfff954f10e33526708d5e6216eb7d850 100644 (file)
@@ -89,6 +89,7 @@ static void __init vmx_display_features(void)
     P(cpu_has_vmx_vnmi, "Virtual NMI");
     P(cpu_has_vmx_msr_bitmap, "MSR direct-access bitmap");
     P(cpu_has_vmx_unrestricted_guest, "Unrestricted Guest");
+    P(cpu_has_vmx_apic_reg_virt, "APIC Register Virtualization");
 #undef P
 
     if ( !printed )
@@ -182,6 +183,14 @@ static int vmx_init_vmcs_config(void)
         if ( opt_unrestricted_guest_enabled )
             opt |= SECONDARY_EXEC_UNRESTRICTED_GUEST;
 
+        /*
+         * "APIC Register Virtualization"
+         * can be set only when "use TPR shadow" is set
+         */
+        if ( _vmx_cpu_based_exec_control & CPU_BASED_TPR_SHADOW )
+            opt |= SECONDARY_EXEC_APIC_REGISTER_VIRT;
+
+
         _vmx_secondary_exec_control = adjust_vmx_controls(
             "Secondary Exec Control", min, opt,
             MSR_IA32_VMX_PROCBASED_CTLS2, &mismatch);
index 2b53164085f022e51a56cd6b0f7b4830a413b3f9..91a99930b8a9427c199e724c6ddbc68c5bbe2fd4 100644 (file)
@@ -2197,6 +2197,16 @@ static void vmx_idtv_reinject(unsigned long idtv_info)
     }
 }
 
+static int vmx_handle_apic_write(void)
+{
+    unsigned long exit_qualification = __vmread(EXIT_QUALIFICATION);
+    unsigned int offset = exit_qualification & 0xfff;
+
+    ASSERT(cpu_has_vmx_apic_reg_virt);
+
+    return vlapic_apicv_write(current, offset);
+}
+
 void vmx_vmexit_handler(struct cpu_user_regs *regs)
 {
     unsigned int exit_reason, idtv_info, intr_info = 0, vector = 0;
@@ -2649,6 +2659,11 @@ void vmx_vmexit_handler(struct cpu_user_regs *regs)
         break;
     }
 
+    case EXIT_REASON_APIC_WRITE:
+        if ( vmx_handle_apic_write() )
+            hvm_inject_hw_exception(TRAP_gp_fault, 0);
+        break;
+
     case EXIT_REASON_ACCESS_GDTR_OR_IDTR:
     case EXIT_REASON_ACCESS_LDTR_OR_TR:
     case EXIT_REASON_VMX_PREEMPTION_TIMER_EXPIRED:
index 2ec64820153e7966f386cd3fd9d843fc428114e2..1c3212241d9eea45585226dcedfde9b867567df0 100644 (file)
@@ -103,6 +103,8 @@ void vlapic_EOI_set(struct vlapic *vlapic);
 
 int vlapic_ipi(struct vlapic *vlapic, uint32_t icr_low, uint32_t icr_high);
 
+int vlapic_apicv_write(struct vcpu *v, unsigned int offset);
+
 struct vlapic *vlapic_lowest_prio(
     struct domain *d, struct vlapic *source,
     int short_hand, uint8_t dest, uint8_t dest_mode);
index 975bc13b1f0fc68b72199a5147ffe8b7f29ad5d7..7e57dc2cbf7499aede770f41e7750f34fe8006ab 100644 (file)
@@ -180,6 +180,7 @@ extern u32 vmx_vmentry_control;
 #define SECONDARY_EXEC_ENABLE_VPID              0x00000020
 #define SECONDARY_EXEC_WBINVD_EXITING           0x00000040
 #define SECONDARY_EXEC_UNRESTRICTED_GUEST       0x00000080
+#define SECONDARY_EXEC_APIC_REGISTER_VIRT       0x00000100
 #define SECONDARY_EXEC_PAUSE_LOOP_EXITING       0x00000400
 #define SECONDARY_EXEC_ENABLE_INVPCID           0x00001000
 extern u32 vmx_secondary_exec_control;
@@ -228,6 +229,8 @@ extern bool_t cpu_has_vmx_ins_outs_instr_info;
      SECONDARY_EXEC_UNRESTRICTED_GUEST)
 #define cpu_has_vmx_ple \
     (vmx_secondary_exec_control & SECONDARY_EXEC_PAUSE_LOOP_EXITING)
+#define cpu_has_vmx_apic_reg_virt \
+    (vmx_secondary_exec_control & SECONDARY_EXEC_APIC_REGISTER_VIRT)
 
 /* GUEST_INTERRUPTIBILITY_INFO flags. */
 #define VMX_INTR_SHADOW_STI             0x00000001
index 6d9402b182235b03447c81f5c59cd500c41db0b7..27704f1f389e6a21b8340c907763b54fde35c1ce 100644 (file)
@@ -129,6 +129,7 @@ void vmx_update_cpu_exec_control(struct vcpu *v);
 #define EXIT_REASON_INVVPID             53
 #define EXIT_REASON_WBINVD              54
 #define EXIT_REASON_XSETBV              55
+#define EXIT_REASON_APIC_WRITE          56
 #define EXIT_REASON_INVPCID             58
 
 /*