struct madt_io_apic *io_apic;
memset(madt, 0, madt_size);
- madt->local_apic_address = cpu_to_le32(0xfee00000);
+ madt->local_apic_address = cpu_to_le32(BUILD_APIC_ADDR);
madt->flags = cpu_to_le32(1);
apic = (void *)(madt + 1);
for(i=0;i<smp_cpus;i++) {
io_apic->type = APIC_IO;
io_apic->length = sizeof(*io_apic);
io_apic->io_apic_id = smp_cpus;
- io_apic->address = cpu_to_le32(0xfec00000);
+ io_apic->address = cpu_to_le32(BUILD_IOAPIC_ADDR);
io_apic->interrupt = cpu_to_le32(0);
acpi_build_table_header((struct acpi_table_header *)madt,
// 64 KB used to copy the BIOS to shadow RAM
#define BUILD_BIOS_TMP_ADDR 0x30000
+#define BUILD_APIC_ADDR 0xfee00000
+#define BUILD_IOAPIC_ADDR 0xfec00000
+
#define BUILD_SMM_INIT_ADDR 0x38000
#define BUILD_SMM_ADDR 0xa8000
#define BUILD_SMM_SIZE 0x8000
putle32(&q, 0); /* OEM table ptr */
putle16(&q, 0); /* OEM table size */
putle16(&q, smp_cpus + 18); /* entry count */
- putle32(&q, 0xfee00000); /* local APIC addr */
+ putle32(&q, BUILD_APIC_ADDR); /* local APIC addr */
putle16(&q, 0); /* ext table length */
putb(&q, 0); /* ext table checksum */
putb(&q, 0); /* reserved */
putb(&q, ioapic_id); /* apic ID */
putb(&q, 0x11); /* I/O APIC version number */
putb(&q, 1); /* enable */
- putle32(&q, 0xfec00000); /* I/O APIC addr */
+ putle32(&q, BUILD_IOAPIC_ADDR); /* I/O APIC addr */
/* irqs */
for(i = 0; i < 16; i++) {
#define CPUID_APIC (1 << 9)
-#define APIC_BASE ((u8 *)0xfee00000)
-#define APIC_ICR_LOW 0x300
-#define APIC_SVR 0x0F0
-#define APIC_ID 0x020
-#define APIC_LVT3 0x370
+#define APIC_ICR_LOW ((u8*)BUILD_APIC_ADDR + 0x300)
+#define APIC_SVR ((u8*)BUILD_APIC_ADDR + 0x0F0)
#define APIC_ENABLED 0x0100
*(u64*)BUILD_AP_BOOT_ADDR = new;
// enable local APIC
- u32 val = readl(APIC_BASE + APIC_SVR);
- writel(APIC_BASE + APIC_SVR, val | APIC_ENABLED);
+ u32 val = readl(APIC_SVR);
+ writel(APIC_SVR, val | APIC_ENABLED);
// broadcast SIPI
- writel(APIC_BASE + APIC_ICR_LOW, 0x000C4500);
+ writel(APIC_ICR_LOW, 0x000C4500);
u32 sipi_vector = BUILD_AP_BOOT_ADDR >> 12;
- writel(APIC_BASE + APIC_ICR_LOW, 0x000C4600 | sipi_vector);
+ writel(APIC_ICR_LOW, 0x000C4600 | sipi_vector);
// Wait for other CPUs to process the SIPI.
mdelay(10);
// Restore memory.
- writel(APIC_BASE + APIC_SVR, val);
+ writel(APIC_SVR, val);
*(u64*)BUILD_AP_BOOT_ADDR = old;
u32 count = readl(&smp_cpus);