cpu_map: Add TSX_CTRL bit for IA32_ARCH_CAPABILITIES MSR

CVE-2019-11135

When TSX_CTRL bit of IA32_ARCH_CAPABILITIES MSR is set to 1, the CPU
supports IA32_TSX_CTRL MSR which can be used to disable and/or mask TSX.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Ján Tomko <jtomko@redhat.com>

diff --git a/src/cpu_map/x86_features.xml b/src/cpu_map/x86_features.xml
index d1180ed26dd6da9d930384cf25f04f2a678ae705..b42b490160022e619710122bf510f2b2a3ce139d 100644 (file)
--- a/src/cpu_map/x86_features.xml
+++ b/src/cpu_map/x86_features.xml
@@ -502,6 +502,9 @@
   <feature name='mds-no'>
     <msr index='0x10a' edx='0x00000000' eax='0x00000020'/>
   </feature>
+  <feature name='tsx-ctrl'>
+    <msr index='0x10a' edx='0x00000000' eax='0x00000080'/>
+  </feature>
   <feature name='taa-no'>
     <msr index='0x10a' edx='0x00000000' eax='0x00000100'/>
   </feature>