]> xenbits.xensource.com Git - people/vhanquez/xen.git/commitdiff
x86: Allow dom0 pstate control to access APERF/MPERF/HWCR MSRs
authorKeir Fraser <keir.fraser@citrix.com>
Fri, 13 Aug 2010 07:59:52 +0000 (08:59 +0100)
committerKeir Fraser <keir.fraser@citrix.com>
Fri, 13 Aug 2010 07:59:52 +0000 (08:59 +0100)
The current version of the powernow driver uses the APERF/MPEF
and the HWCR MSRs.  Add cases in traps.c to let dom0 access
those MSRs.

Signed-off-by: Mark Langsdorf <mark.langsdorf@amd.com>
xen-unstable changeset:   6471b8b71401
xen-unstable date:        Fri Aug 13 08:38:35 2010 +0100

xen/arch/x86/traps.c

index 1834314f3d522fd8d2fed7eb053ad0f7b8cf1c5a..d9a8a52f28fd8475a5925eb67dff9c3aef8e27b2 100644 (file)
@@ -2220,6 +2220,7 @@ static int emulate_privileged_op(struct cpu_user_regs *regs)
         case MSR_K8_PSTATE5:
         case MSR_K8_PSTATE6:
         case MSR_K8_PSTATE7:
+        case MSR_K8_HWCR:
             if ( boot_cpu_data.x86_vendor != X86_VENDOR_AMD )
                 goto fail;
             if ( !is_cpufreq_controller(v->domain) )
@@ -2259,6 +2260,14 @@ static int emulate_privileged_op(struct cpu_user_regs *regs)
             break;
         case MSR_IA32_MPERF:
         case MSR_IA32_APERF:
+            if (( boot_cpu_data.x86_vendor != X86_VENDOR_INTEL ) &&
+                ( boot_cpu_data.x86_vendor != X86_VENDOR_AMD ) )
+                goto fail;
+            if ( !is_cpufreq_controller(v->domain) )
+                break;
+            if ( wrmsr_safe(regs->ecx, eax, edx) != 0 )
+                goto fail;
+            break;
         case MSR_IA32_PERF_CTL:
             if ( boot_cpu_data.x86_vendor != X86_VENDOR_INTEL )
                 goto fail;