Factor spin-table into its own file

This patch factors out the spin-table boot protocol into its own file,
leaving boot.S to do all of the required EL3 initialisation, and calling
upon ns_init to perform EL2 initialisation.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>

diff --git a/Makefile b/Makefile
index ad969ed2e2b06c8c07283f6c6a11b4d2a10a67bb..827dc7cde69daca454167decac7b8d2b7f1f7579 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -24,6 +24,7 @@ DEFINES               += -DUART_BASE=$(UART_BASE)
 CPPFLAGS       += $(INITRD_FLAGS)
 
 BOOTLOADER     := boot.S
+BOOTMETHOD     := spin.o
 MBOX_OFFSET    := 0xfff8
 KERNEL         := Image
 KERNEL_OFFSET  := 0x80000
@@ -65,16 +66,16 @@ DTC         := $(if $(wildcard ./dtc), ./dtc, $(shell which dtc))
 all: $(IMAGE)
 
 clean:
-       rm -f $(IMAGE) boot.o gic.o ns.o model.lds fdt.dtb
+       rm -f $(IMAGE) boot.o gic.o ns.o $(BOOTMETHOD) model.lds fdt.dtb
 
-$(IMAGE): boot.o gic.o ns.o model.lds fdt.dtb $(KERNEL) $(FILESYSTEM)
+$(IMAGE): boot.o gic.o ns.o $(BOOTMETHOD) model.lds fdt.dtb $(KERNEL) $(FILESYSTEM)
        $(LD) -o $@ --script=model.lds
 
 %.o: %.S Makefile
        $(CC) $(CPPFLAGS) $(DEFINES) -c -o $@ $<
 
 model.lds: $(LD_SCRIPT) Makefile
-       $(CC) $(CPPFLAGS) -DPHYS_OFFSET=$(PHYS_OFFSET) -DMBOX_OFFSET=$(MBOX_OFFSET) -DKERNEL_OFFSET=$(KERNEL_OFFSET) -DFDT_OFFSET=$(FDT_OFFSET) -DFS_OFFSET=$(FS_OFFSET) -DKERNEL=$(KERNEL) -DFILESYSTEM=$(FILESYSTEM) -E -P -C -o $@ $<
+       $(CC) $(CPPFLAGS) -DPHYS_OFFSET=$(PHYS_OFFSET) -DMBOX_OFFSET=$(MBOX_OFFSET) -DKERNEL_OFFSET=$(KERNEL_OFFSET) -DFDT_OFFSET=$(FDT_OFFSET) -DFS_OFFSET=$(FS_OFFSET) -DKERNEL=$(KERNEL) -DFILESYSTEM=$(FILESYSTEM) -DBOOTMETHOD=$(BOOTMETHOD) -E -P -C -o $@ $<
 
 ifeq ($(DTC),)
        $(error No dtc found! You can git clone from git://git.jdl.com/software/dtc.git)

diff --git a/boot.S b/boot.S
index e4577fbdcf533f745a62dd8c0961bf216ed6bda4..29ffb6f1cec68331fc5ebb46ca2320440ade3389 100644 (file)
--- a/boot.S
+++ b/boot.S
@@ -18,7 +18,7 @@ _start:
         */
        mrs     x0, CurrentEL
        cmp     x0, #CURRENTEL_EL3
-       b.ne    start_ns                        // skip EL3 initialisation
+       b.ne    start_no_el3                    // skip EL3 initialisation
 
        mov     x0, #0x30                       // RES1
        orr     x0, x0, #(1 << 0)               // Non-secure EL1
@@ -35,44 +35,8 @@ _start:
 
        msr     sctlr_el2, xzr
 
-       /*
-        * Prepare the switch to the EL2_SP1 mode from EL3
-        */
-       ldr     x0, =start_ns                   // Return after mode switch
-       mov     x1, #SPSR_KERNEL
-       drop_el x1, x0
-
-start_ns:
-       /*
-        * Kernel parameters
-        */
-       mov     x0, xzr
-       mov     x1, xzr
-       mov     x2, xzr
-       mov     x3, xzr
-
-       mrs     x4, mpidr_el1
-       ldr     x5, =MPIDR_ID_BITS
-       tst     x4, x5
-       b.eq    2f
-
-       /*
-        * Secondary CPUs
-        */
-1:     wfe
-       ldr     x4, mbox
-       cbz     x4, 1b
-       br      x4                              // branch to the given address
-
-2:
-
-       /*
-        * Primary CPU
-        */
-       bl      ns_init_system
-       ldr     x0, =dtb                        // device tree blob
-       b       kernel
+       b       start_el3
 
        .ltorg
 
-       .org    0x200
+       .org    0x100

diff --git a/model.lds.S b/model.lds.S
index 92a3b8ae494e4f1fecf9149152de92043dffc31d..39318578c5b63411f4824e163f132e5e59c5bd0e 100644 (file)
--- a/model.lds.S
+++ b/model.lds.S
@@ -14,6 +14,7 @@ TARGET(binary)
 INPUT(./boot.o)
 INPUT(./gic.o)
 INPUT(./ns.o)
+INPUT(./BOOTMETHOD)
 INPUT(KERNEL)
 INPUT(./fdt.dtb)
 
@@ -27,6 +28,7 @@ SECTIONS
        .text : { boot.o }
        .text : { gic.o }
        .text : { ns.o }
+       .text : { BOOTMETHOD }
        . = PHYS_OFFSET + MBOX_OFFSET;
        mbox = .;
        .mbox : { QUAD(0x0) }

diff --git a/spin.S b/spin.S
new file mode 100644 (file)
index 0000000..4ad3cf2
--- /dev/null
+++ b/spin.S
@@ -0,0 +1,57 @@
+/*
+ * spin.S - spin-table boot protocol implementation
+ *
+ * Copyright (C) 2013 ARM Limited. All rights reserved.
+ *
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE.txt file.
+ */
+
+#include "common.S"
+
+       .text
+
+       .globl start_no_el3
+       .globl start_el3
+
+start_el3:
+       /*
+        * Prepare the switch to the EL2_SP1 mode from EL3
+        */
+       ldr     x0, =start_no_el3               // Return after mode switch
+       mov     x1, #SPSR_KERNEL
+       drop_el x1, x0
+
+start_no_el3:
+       /*
+        * Kernel parameters
+        */
+       mov     x0, xzr
+       mov     x1, xzr
+       mov     x2, xzr
+       mov     x3, xzr
+
+       mrs     x4, mpidr_el1
+       ldr     x5, =MPIDR_ID_BITS
+       tst     x4, x5
+       b.eq    2f
+
+       /*
+        * Secondary CPUs
+        */
+1:     wfe
+       ldr     x4, mbox
+       cbz     x4, 1b
+       br      x4                              // branch to the given address
+
+2:
+       /*
+        * Primary CPU
+        */
+       bl      ns_init_system
+       ldr     x0, =dtb                        // device tree blob
+       b       kernel
+
+       .ltorg
+
+       .org    0x80