]> xenbits.xensource.com Git - qemu-xen.git/commitdiff
target/hppa: Mask inputs in copy_iaoq_entry
authorRichard Henderson <richard.henderson@linaro.org>
Fri, 27 Oct 2023 02:03:34 +0000 (19:03 -0700)
committerRichard Henderson <richard.henderson@linaro.org>
Tue, 7 Nov 2023 02:49:33 +0000 (18:49 -0800)
Ensure that the destination is always a valid GVA offset.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
target/hppa/translate.c

index c2db2782f4a17aedd132dd1a768cd67ad3e580e3..cf05d8b6e49e0ff0297301df00ed3b81cfa53e89 100644 (file)
@@ -720,10 +720,22 @@ static target_ureg gva_offset_mask(DisasContext *ctx)
 static void copy_iaoq_entry(DisasContext *ctx, TCGv_reg dest,
                             target_ureg ival, TCGv_reg vval)
 {
-    if (unlikely(ival == -1)) {
+    target_ureg mask = gva_offset_mask(ctx);
+
+    if (ival != -1) {
+        tcg_gen_movi_reg(dest, ival & mask);
+        return;
+    }
+    tcg_debug_assert(vval != NULL);
+
+    /*
+     * We know that the IAOQ is already properly masked.
+     * This optimization is primarily for "iaoq_f = iaoq_b".
+     */
+    if (vval == cpu_iaoq_f || vval == cpu_iaoq_b) {
         tcg_gen_mov_reg(dest, vval);
     } else {
-        tcg_gen_movi_reg(dest, ival);
+        tcg_gen_andi_reg(dest, vval, mask);
     }
 }