]> xenbits.xensource.com Git - qemu-xen.git/commitdiff
fix "Missing break in switch" coverity reports
authorPaolo Bonzini <pbonzini@redhat.com>
Wed, 1 Aug 2018 15:14:09 +0000 (17:14 +0200)
committerPaolo Bonzini <pbonzini@redhat.com>
Thu, 23 Aug 2018 11:32:50 +0000 (13:32 +0200)
Many of these are marked as "intentional/fix required" because they
just need adding a fall through comment.  This is exactly what this
patch does, except for target/mips/translate.c where it is easier to
duplicate the code, and hw/audio/sb16.c where I consulted the DOSBox
sources and decide to just remove the LOG_UNIMP before the fallthrough.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
disas/m68k.c
hw/arm/pxa2xx.c
hw/audio/cs4231a.c
hw/audio/gusemu_hal.c
hw/audio/sb16.c
hw/display/cg3.c
hw/display/cirrus_vga.c
hw/timer/sh_timer.c
target/arm/helper.c
target/i386/translate.c

index a687df437c6227731daf86fd488e744c0eeec50a..0dc8aa1a3c546b59513081802809c4dddfe95ae4 100644 (file)
@@ -1623,6 +1623,7 @@ print_insn_arg (const char *d,
 
     case 'X':
       place = '8';
+      /* fall through */
     case 'Y':
     case 'Z':
     case 'W':
index b67b0cefb6a045dcb6e46ae00710a04909b7a518..f598a1c053e93a7a40bc746581a14177bedbc2a0 100644 (file)
@@ -409,7 +409,7 @@ static uint64_t pxa2xx_mm_read(void *opaque, hwaddr addr,
     case MDCNFG ... SA1110:
         if ((addr & 3) == 0)
             return s->mm_regs[addr >> 2];
-
+        /* fall through */
     default:
         printf("%s: Bad register " REG_FMT "\n", __func__, addr);
         break;
index aaebec18393a6aa20d0a2812282d5e95cbd86668..9089dcb47e8496088c15c5ea805b40d1828c6182 100644 (file)
@@ -305,6 +305,7 @@ static void cs_reset_voices (CSState *s, uint32_t val)
 
     case 6:
         as.endianness = 1;
+        /* fall through */
     case 2:
         as.fmt = AUD_FMT_S16;
         s->shift = as.nchannels;
index 1150fc4426989272d507b66c13f4a7f03f1c0e60..ae40ca341cc4ef43b2c430d84dfac465378398f7 100644 (file)
@@ -261,6 +261,7 @@ void gus_write(GUSEmuState * state, int port, int size, unsigned int data)
             GUSregb(IRQStatReg2x6) = 0x10;
             GUS_irqrequest(state, state->gusirq, 1);
         }
+        /* fall through */
     case 0x20D:                /* SB2xCd no IRQ */
         GUSregb(SB2xCd) = (uint8_t) data;
         break;
index 5a4d32364ef534fe304f3e79003cc497fae65102..c5b9bf79e819caba8f818d66767db51bc8ac97cd 100644 (file)
@@ -741,10 +741,15 @@ static void complete (SB16State *s)
             ldebug ("set time const %d\n", s->time_const);
             break;
 
-        case 0x42:              /* FT2 sets output freq with this, go figure */
-            qemu_log_mask(LOG_UNIMP, "cmd 0x42 might not do what it think it"
-                          " should\n");
         case 0x41:
+        case 0x42:
+            /*
+             * 0x41 is documented as setting the output sample rate,
+             * and 0x42 the input sample rate, but in fact SB16 hardware
+             * seems to have only a single sample rate under the hood,
+             * and FT2 sets output freq with this (go figure).  Compare:
+             * http://homepages.cae.wisc.edu/~brodskye/sb16doc/sb16doc.html#SamplingRate
+             */
             s->freq = dsp_get_hilo (s);
             ldebug ("set freq %d\n", s->freq);
             break;
index 6fff4852c5ccfce41d1f0525a0090c486bca5248..1c199ab369939b93c209341bc71ed90abc1f5529 100644 (file)
@@ -232,6 +232,7 @@ static void cg3_reg_write(void *opaque, hwaddr addr, uint64_t val,
                 s->b[s->dac_index] = regval;
                 /* Index autoincrement */
                 s->dac_index = (s->dac_index + 1) & 0xff;
+                /* fall through */
             default:
                 s->dac_state = 0;
                 break;
index 7583b18c2927510b2527f66dccb3d3d75524749f..04c87c8e8db409c8697599cbec7608707149aa10 100644 (file)
@@ -1426,7 +1426,8 @@ static void cirrus_vga_write_sr(CirrusVGAState * s, uint32_t val)
         s->vga.hw_cursor_y = (val << 3) | (s->vga.sr_index >> 5);
        break;
     case 0x07:                 // Extended Sequencer Mode
-    cirrus_update_memory_access(s);
+        cirrus_update_memory_access(s);
+        /* fall through */
     case 0x08:                 // EEPROM Control
     case 0x09:                 // Scratch Register 0
     case 0x0a:                 // Scratch Register 1
index 5f8736cf10a6fd5a0072e1de624e46b9679980db..91b18ba3127298f7486708d3f4559631e5934c10 100644 (file)
@@ -74,6 +74,7 @@ static uint32_t sh_timer_read(void *opaque, hwaddr offset)
     case OFFSET_TCPR:
         if (s->feat & TIMER_FEAT_CAPT)
             return s->tcpr;
+        /* fall through */
     default:
         hw_error("sh_timer_read: Bad offset %x\n", (int)offset);
         return 0;
index c9bce1efcb2e961d5fb5c6e5266072abd8c279ee..1b0548084ab9cc82cc16193fcb04b0be084f4d7b 100644 (file)
@@ -12331,6 +12331,7 @@ int arm_rmode_to_sf(int rmode)
         /* FIXME: add support for TIEAWAY and ODD */
         qemu_log_mask(LOG_UNIMP, "arm: unimplemented rounding mode: %d\n",
                       rmode);
+        /* fall through for now */
     case FPROUNDING_TIEEVEN:
     default:
         rmode = float_round_nearest_even;
index 07d185e7b6086593e55bcb589a7f90959ef49aa0..1f9d1d9b2408c1e8c020f3e52fe68254a361c054 100644 (file)
@@ -4689,6 +4689,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
     case 0x82:
         if (CODE64(s))
             goto illegal_op;
+        /* fall through */
     case 0x80: /* GRP1 */
     case 0x81:
     case 0x83:
@@ -8292,6 +8293,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
     case 0x10e ... 0x10f:
         /* 3DNow! instructions, ignore prefixes */
         s->prefix &= ~(PREFIX_REPZ | PREFIX_REPNZ | PREFIX_DATA);
+        /* fall through */
     case 0x110 ... 0x117:
     case 0x128 ... 0x12f:
     case 0x138 ... 0x13a: