x86: When emulating PV RDMSR/WRMSR, only look at low 32 bits of RCX.

Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
This is based on part of:
xen-unstable changeset:   16616:136f80d219588b5e45a5d13e19dd51a2401504f5
xen-unstable date:        Fri Dec 14 11:37:02 2007 +0000

diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c
index 2c5f5ecda1dadbe7d676b2ac9d1bfdaff13efeb9..9d259934c35043cf3bb666177595ad45b6418ef8 100644 (file)
--- a/xen/arch/x86/traps.c
+++ b/xen/arch/x86/traps.c
@@ -1711,7 +1711,7 @@ static int emulate_privileged_op(struct cpu_user_regs *regs)
         eax = regs->eax;
         edx = regs->edx;
         res = ((u64)edx << 32) | eax;
-        switch ( regs->ecx )
+        switch ( (u32)regs->ecx )
         {
 #ifdef CONFIG_X86_64
         case MSR_FS_BASE:
@@ -1750,7 +1750,7 @@ static int emulate_privileged_op(struct cpu_user_regs *regs)
         break;
 
     case 0x32: /* RDMSR */
-        switch ( regs->ecx )
+        switch ( (u32)regs->ecx )
         {
 #ifdef CONFIG_X86_64
         case MSR_FS_BASE: