{
MOS6522Q800VIA1State *v1s = opaque;
MOS6522State *s = MOS6522(v1s);
- MOS6522DeviceClass *mdc = MOS6522_GET_CLASS(s);
+ qemu_irq irq = qdev_get_gpio_in(DEVICE(s), VIA1_IRQ_60HZ_BIT);
- s->ifr |= VIA1_IRQ_60HZ;
- mdc->update_irq(s);
+ qemu_set_irq(irq, 1);
via1_sixty_hz_update(v1s);
}
{
MOS6522Q800VIA1State *v1s = opaque;
MOS6522State *s = MOS6522(v1s);
- MOS6522DeviceClass *mdc = MOS6522_GET_CLASS(s);
+ qemu_irq irq = qdev_get_gpio_in(DEVICE(s), VIA1_IRQ_ONE_SECOND_BIT);
- s->ifr |= VIA1_IRQ_ONE_SECOND;
- mdc->update_irq(s);
+ qemu_set_irq(irq, 1);
via1_one_second_update(v1s);
}
-static void via1_irq_request(void *opaque, int irq, int level)
-{
- MOS6522Q800VIA1State *v1s = opaque;
- MOS6522State *s = MOS6522(v1s);
- MOS6522DeviceClass *mdc = MOS6522_GET_CLASS(s);
-
- if (level) {
- s->ifr |= 1 << irq;
- } else {
- s->ifr &= ~(1 << irq);
- }
-
- mdc->update_irq(s);
-}
-
-static void via2_irq_request(void *opaque, int irq, int level)
-{
- MOS6522Q800VIA2State *v2s = opaque;
- MOS6522State *s = MOS6522(v2s);
- MOS6522DeviceClass *mdc = MOS6522_GET_CLASS(s);
-
- if (level) {
- s->ifr |= 1 << irq;
- } else {
- s->ifr &= ~(1 << irq);
- }
-
- mdc->update_irq(s);
-}
-
static void pram_update(MOS6522Q800VIA1State *v1s)
{
qbus_init((BusState *)&v1s->adb_bus, sizeof(v1s->adb_bus),
TYPE_ADB_BUS, DEVICE(v1s), "adb.0");
- qdev_init_gpio_in(DEVICE(obj), via1_irq_request, VIA1_IRQ_NB);
-
/* A/UX mode */
qdev_init_gpio_out(DEVICE(obj), &v1s->auxmode_irq, 1);
}
ms->a = 0x7f;
}
-static void via2_nubus_irq_request(void *opaque, int irq, int level)
+static void via2_nubus_irq_request(void *opaque, int n, int level)
{
MOS6522Q800VIA2State *v2s = opaque;
MOS6522State *s = MOS6522(v2s);
- MOS6522DeviceClass *mdc = MOS6522_GET_CLASS(s);
+ qemu_irq irq = qdev_get_gpio_in(DEVICE(s), VIA2_IRQ_NUBUS_BIT);
if (level) {
/* Port A nubus IRQ inputs are active LOW */
- s->a &= ~(1 << irq);
- s->ifr |= 1 << VIA2_IRQ_NUBUS_BIT;
+ s->a &= ~(1 << n);
} else {
- s->a |= (1 << irq);
- s->ifr &= ~(1 << VIA2_IRQ_NUBUS_BIT);
+ s->a |= (1 << n);
}
- mdc->update_irq(s);
+ qemu_set_irq(irq, level);
}
static void mos6522_q800_via2_init(Object *obj)
"via2", VIA_SIZE);
sysbus_init_mmio(sbd, &v2s->via_mem);
- qdev_init_gpio_in(DEVICE(obj), via2_irq_request, VIA2_IRQ_NB);
-
qdev_init_gpio_in_named(DEVICE(obj), via2_nubus_irq_request, "nubus-irq",
VIA2_NUBUS_IRQ_NB);
}
}
}
+static void mos6522_set_irq(void *opaque, int n, int level)
+{
+ MOS6522State *s = MOS6522(opaque);
+
+ if (level) {
+ s->ifr |= 1 << n;
+ } else {
+ s->ifr &= ~(1 << n);
+ }
+
+ mos6522_update_irq(s);
+}
+
static uint64_t get_counter_value(MOS6522State *s, MOS6522Timer *ti)
{
MOS6522DeviceClass *mdc = MOS6522_GET_CLASS(s);
s->timers[0].timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, mos6522_timer1, s);
s->timers[1].timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, mos6522_timer2, s);
+
+ qdev_init_gpio_in(DEVICE(obj), mos6522_set_irq, VIA_NUM_INTS);
}
static void mos6522_finalize(Object *obj)
#define VIA1_IRQ_ADB_DATA_BIT CB2_INT_BIT
#define VIA1_IRQ_ADB_CLOCK_BIT CB1_INT_BIT
-#define VIA1_IRQ_NB 8
-
#define VIA1_IRQ_ONE_SECOND BIT(VIA1_IRQ_ONE_SECOND_BIT)
#define VIA1_IRQ_60HZ BIT(VIA1_IRQ_60HZ_BIT)
#define VIA1_IRQ_ADB_READY BIT(VIA1_IRQ_ADB_READY_BIT)
MemoryRegion via_mem;
- qemu_irq irqs[VIA1_IRQ_NB];
qemu_irq auxmode_irq;
uint8_t last_b;
#define VIA2_IRQ_SCSI_BIT CB2_INT_BIT
#define VIA2_IRQ_ASC_BIT CB1_INT_BIT
-#define VIA2_IRQ_NB 8
-
#define VIA2_IRQ_SCSI_DATA BIT(VIA2_IRQ_SCSI_DATA_BIT)
#define VIA2_IRQ_NUBUS BIT(VIA2_IRQ_NUBUS_BIT)
#define VIA2_IRQ_UNUSED BIT(VIA2_IRQ_SCSI_BIT)