fix SetWay bits alignment for DC op

Althought comment is aligned with ARMv8 ARM implentation is different. In
fact, "set" is shifted by "shift" and "way" is shifted by "line size".

Correct this missalignment.

Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Mark Rutland <mark.rutland@arm.com>

diff --git a/cache.S b/cache.S
index e8a73c8c9d014d945b626e11d3d317cfca59f7a1..32e5652397bac7e5695f6bee615c5fb621565764 100644 (file)
--- a/cache.S
+++ b/cache.S
@@ -47,9 +47,9 @@ flush_caches:
        /* loop over sets */
        /* build the set/way command */
 3:     lsl     x9, x2, #1              /* cache level (-1) */
-       lsl     x10, x8, x5             /* way << shift */
+       lsl     x10, x6, x5             /* way << shift */
        orr     x9, x9, x10
-       lsl     x10, x6, x4             /* set << line size */
+       lsl     x10, x8, x4             /* set << line size */
        orr     x9, x9, x10
 
        dc      cisw, x9