for ( i = 0; i < action->nr_guests; i++ )
{
struct domain *d = action->guest[i];
- unsigned int pirq = domain_irq_to_pirq(d, irq);
+ struct pirq *pirq = pirq_info(d, domain_irq_to_pirq(d, irq));
- if ( test_and_clear_bool(pirq_info(d, pirq)->masked) )
+ if ( test_and_clear_bool(pirq->masked) )
action->in_flight--;
}
int time_suspend(void)
{
- if ( smp_processor_id() == 0 )
+ unsigned int cpu = smp_processor_id();
+
+ if ( cpu == 0 )
{
cmos_utc_offset = -get_wallclock_time();
cmos_utc_offset += get_sec();
}
/* Better to cancel calibration timer for accuracy. */
- clear_bit(TIME_CALIBRATE_SOFTIRQ, &softirq_pending(smp_processor_id()));
+ clear_bit(TIME_CALIBRATE_SOFTIRQ, &softirq_pending(cpu));
return 0;
}
unsigned int bdf, unsigned int index)
{
union irte_ptr entry = get_intremap_entry(iommu, bdf, index);
+ struct ivrs_mappings *ivrs = get_ivrs_mappings(iommu->seg);
if ( iommu->ctrl.ga_en )
{
else
ACCESS_ONCE(entry.ptr32->raw) = 0;
- __clear_bit(index, get_ivrs_mappings(iommu->seg)[bdf].intremap_inuse);
+ __clear_bit(index, ivrs[bdf].intremap_inuse);
}
static void update_intremap_entry(const struct amd_iommu *iommu,