#include "qemu/module.h"
#include "hw/mips/cps.h"
#include "hw/mips/mips.h"
+#include "hw/qdev-clock.h"
#include "hw/qdev-properties.h"
#include "hw/mips/cpudevs.h"
#include "sysemu/kvm.h"
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
MIPSCPSState *s = MIPS_CPS(obj);
+ s->clock = qdev_init_clock_in(DEVICE(obj), "clk-in", NULL, NULL);
/*
* Cover entire address space as there do not seem to be any
* constraints for the base address of CPC and GIC.
errp)) {
return;
}
+ /* All cores use the same clock tree */
+ qdev_connect_clock_in(DEVICE(cpu), "clk-in", s->clock);
if (!qdev_realize_and_unref(DEVICE(cpu), NULL, errp)) {
return;
#define MIPS_CPS_H
#include "hw/sysbus.h"
+#include "hw/clock.h"
#include "hw/misc/mips_cmgcr.h"
#include "hw/intc/mips_gic.h"
#include "hw/misc/mips_cpc.h"
MIPSGICState gic;
MIPSCPCState cpc;
MIPSITUState itu;
+ Clock *clock;
};
qemu_irq get_cps_irq(MIPSCPSState *cps, int pin_number);