cpu: Add support for al57 Intel features

We can start qemu with a "cpu,+la57" to set 57-bit vitrual address
space. So VM can be aware that it need to enable 5-level paging.

Corresponding QEMU commits:
        al57 6c7c3c21f95dd9af8a0691c0dd29b07247984122

diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml
index 85c728227feb127c3639a1d7762e6c3f81c89a83..00a43b172c4711d25570107580055fa8950aadb3 100644 (file)
--- a/src/cpu/cpu_map.xml
+++ b/src/cpu/cpu_map.xml
@@ -285,6 +285,9 @@
     <feature name='ospke'>
       <cpuid eax_in='0x07' ecx_in='0x00' ecx='0x00000010'/>
     </feature>
+    <feature name='la57'>
+      <cpuid eax_in='0x07' ecx_in='0x00' ecx='0x00010000'/>
+    </feature>
 
     <feature name='avx512-4vnniw'>
       <cpuid eax_in='0x07' ecx_in='0x00' edx='0x00000004'/>

diff --git a/tests/domaincapsschemadata/qemu_2.9.0-tcg.x86_64.xml b/tests/domaincapsschemadata/qemu_2.9.0-tcg.x86_64.xml
index 7ff998907df81ec5407966a243e0b36f264fb2c5..6c2bbac190c73856397795d6d1e3220793d0c3d6 100644 (file)
--- a/tests/domaincapsschemadata/qemu_2.9.0-tcg.x86_64.xml
+++ b/tests/domaincapsschemadata/qemu_2.9.0-tcg.x86_64.xml
@@ -43,6 +43,7 @@
       <feature policy='require' name='clwb'/>
       <feature policy='require' name='pku'/>
       <feature policy='require' name='ospke'/>
+      <feature policy='require' name='la57'/>
       <feature policy='require' name='xsaveopt'/>
       <feature policy='require' name='xgetbv1'/>
       <feature policy='require' name='mmxext'/>