printk("Huh, cpu architecture %x, expected 0xf (defined by cpuid)\n",
c->midr.architecture);
- printk("Processor: %08"PRIx32": \"%s\", variant: 0x%x, part 0x%03x, rev 0x%x\n",
- c->midr.bits, implementer,
+ printk("Processor: %"PRIregister": \"%s\", variant: 0x%x, part 0x%03x,"
+ "rev 0x%x\n", c->midr.bits, implementer,
c->midr.variant, c->midr.part_number, c->midr.revision);
#if defined(CONFIG_ARM_64)
if ( cpu_has_aarch32 )
{
printk("32-bit Execution:\n");
- printk(" Processor Features: %08"PRIx32":%08"PRIx32"\n",
+ printk(" Processor Features: %"PRIregister":%"PRIregister"\n",
boot_cpu_data.pfr32.bits[0], boot_cpu_data.pfr32.bits[1]);
printk(" Instruction Sets:%s%s%s%s%s%s\n",
cpu_has_aarch32 ? " AArch32" : "",
cpu_has_gentimer ? " GenericTimer" : "",
cpu_has_security ? " Security" : "");
- printk(" Debug Features: %08"PRIx32"\n",
+ printk(" Debug Features: %"PRIregister"\n",
boot_cpu_data.dbg32.bits[0]);
- printk(" Auxiliary Features: %08"PRIx32"\n",
+ printk(" Auxiliary Features: %"PRIregister"\n",
boot_cpu_data.aux32.bits[0]);
- printk(" Memory Model Features: "
- "%08"PRIx32" %08"PRIx32" %08"PRIx32" %08"PRIx32"\n",
+ printk(" Memory Model Features: %"PRIregister" %"PRIregister"\n"
+ " %"PRIregister" %"PRIregister"\n",
boot_cpu_data.mm32.bits[0], boot_cpu_data.mm32.bits[1],
boot_cpu_data.mm32.bits[2], boot_cpu_data.mm32.bits[3]);
- printk(" ISA Features: %08x %08x %08x %08x %08x %08x\n",
+ printk(" ISA Features: %"PRIregister" %"PRIregister" %"PRIregister"\n"
+ " %"PRIregister" %"PRIregister" %"PRIregister"\n",
boot_cpu_data.isa32.bits[0], boot_cpu_data.isa32.bits[1],
boot_cpu_data.isa32.bits[2], boot_cpu_data.isa32.bits[3],
boot_cpu_data.isa32.bits[4], boot_cpu_data.isa32.bits[5]);
if ( !opt_hmp_unsafe &&
current_cpu_data.midr.bits != boot_cpu_data.midr.bits )
{
- printk(XENLOG_ERR "CPU%u MIDR (0x%x) does not match boot CPU MIDR (0x%x),\n"
- "disable cpu (see big.LITTLE.txt under docs/).\n",
+ printk(XENLOG_ERR
+ "CPU%u MIDR (0x%"PRIregister") does not match boot CPU MIDR (0x%"PRIregister"),\n"
+ XENLOG_ERR "disable cpu (see big.LITTLE.txt under docs/).\n",
smp_processor_id(), current_cpu_data.midr.bits,
boot_cpu_data.midr.bits);
stop_cpu();
*/
struct cpuinfo_arm {
union {
- uint32_t bits;
+ register_t bits;
struct {
unsigned long revision:4;
unsigned long part_number:12;
unsigned long architecture:4;
unsigned long variant:4;
unsigned long implementer:8;
+#ifdef CONFIG_ARM_64
+ unsigned long _res0:32;
+#endif
};
} midr;
union {
#ifdef CONFIG_ARM_64
/* 64-bit CPUID registers. */
union {
- uint64_t bits[2];
+ register_t bits[2];
struct {
/* PFR0 */
unsigned long el0:4;
} pfr64;
struct {
- uint64_t bits[2];
+ register_t bits[2];
} dbg64;
struct {
- uint64_t bits[2];
+ register_t bits[2];
} aux64;
union {
- uint64_t bits[3];
+ register_t bits[3];
struct {
unsigned long pa_range:4;
unsigned long asid_bits:4;
} mm64;
union {
- uint64_t bits[2];
+ register_t bits[2];
struct {
/* ISAR0 */
unsigned long __res0:4;
* when running in 32-bit mode.
*/
union {
- uint32_t bits[3];
+ register_t bits[3];
struct {
/* PFR0 */
unsigned long arm:4;
unsigned long amu:4;
unsigned long dit:4;
unsigned long ras:4;
+#ifdef CONFIG_ARM_64
+ unsigned long __res0:32;
+#endif
/* PFR1 */
unsigned long progmodel:4;
unsigned long sec_frac:4;
unsigned long virt_frac:4;
unsigned long gic:4;
+#ifdef CONFIG_ARM_64
+ unsigned long __res1:32;
+#endif
/* PFR2 */
unsigned long csv3:4;
unsigned long ssbs:4;
unsigned long ras_frac:4;
unsigned long __res2:20;
+#ifdef CONFIG_ARM_64
+ unsigned long __res3:32;
+#endif
};
} pfr32;
struct {
- uint32_t bits[2];
+ register_t bits[2];
} dbg32;
struct {
- uint32_t bits[1];
+ register_t bits[1];
} aux32;
struct {
- uint32_t bits[6];
+ register_t bits[6];
} mm32;
struct {
- uint32_t bits[7];
+ register_t bits[7];
} isa32;
struct {