case XEN_DOMCTL_ioport_mapping:
{
- struct hvm_iommu *hd;
+ struct domain_iommu *hd;
unsigned int fgp = domctl->u.ioport_mapping.first_gport;
unsigned int fmp = domctl->u.ioport_mapping.first_mport;
unsigned int np = domctl->u.ioport_mapping.nr_ports;
if ( ret )
break;
- hd = domain_hvm_iommu(d);
+ hd = dom_iommu(d);
if ( add )
{
printk(XENLOG_G_INFO
int dpci_ioport_intercept(ioreq_t *p)
{
struct domain *d = current->domain;
- struct hvm_iommu *hd = domain_hvm_iommu(d);
+ const struct domain_iommu *dio = dom_iommu(d);
struct g2m_ioport *g2m_ioport;
unsigned int mport, gport = p->addr;
unsigned int s = 0, e = 0;
int rc;
- list_for_each_entry( g2m_ioport, &hd->arch.g2m_ioport_list, list )
+ list_for_each_entry( g2m_ioport, &dio->arch.g2m_ioport_list, list )
{
s = g2m_ioport->gport;
e = s + g2m_ioport->np;
if ( !is_idle_domain(d) )
{
- struct hvm_iommu *hd = domain_hvm_iommu(d);
- update_iommu_mac(&ctx, hd->arch.pgd_maddr,
- agaw_to_level(hd->arch.agaw));
+ const struct domain_iommu *dio = dom_iommu(d);
+
+ update_iommu_mac(&ctx, dio->arch.pgd_maddr,
+ agaw_to_level(dio->arch.agaw));
}
}
*/
#include <xen/sched.h>
-#include <xen/hvm/iommu.h>
#include <asm/amd-iommu.h>
#include <asm/hvm/svm/amd-iommu-proto.h>
#include "../ats.h"
#include <xen/sched.h>
#include <asm/p2m.h>
-#include <asm/hvm/iommu.h>
#include <asm/amd-iommu.h>
#include <asm/hvm/svm/amd-iommu-proto.h>
static inline struct guest_iommu *domain_iommu(struct domain *d)
{
- return domain_hvm_iommu(d)->arch.g_iommu;
+ return dom_iommu(d)->arch.g_iommu;
}
static inline struct guest_iommu *vcpu_iommu(struct vcpu *v)
{
- return domain_hvm_iommu(v->domain)->arch.g_iommu;
+ return dom_iommu(v->domain)->arch.g_iommu;
}
static void guest_iommu_enable(struct guest_iommu *iommu)
int guest_iommu_init(struct domain* d)
{
struct guest_iommu *iommu;
- struct hvm_iommu *hd = domain_hvm_iommu(d);
+ struct domain_iommu *hd = dom_iommu(d);
if ( !is_hvm_domain(d) || !iommu_enabled || !iommuv2_enabled )
return 0;
tasklet_kill(&iommu->cmd_buffer_tasklet);
xfree(iommu);
- domain_hvm_iommu(d)->arch.g_iommu = NULL;
+ dom_iommu(d)->arch.g_iommu = NULL;
}
static int guest_iommu_mmio_range(struct vcpu *v, unsigned long addr)
#include <xen/err.h>
#include <xen/sched.h>
-#include <xen/hvm/iommu.h>
#include <asm/amd-iommu.h>
#include <asm/hvm/svm/amd-iommu-proto.h>
#include <asm/io_apic.h>
#include <xen/acpi.h>
#include <xen/sched.h>
#include <asm/p2m.h>
-#include <xen/hvm/iommu.h>
#include <asm/amd-iommu.h>
#include <asm/hvm/svm/amd-iommu-proto.h>
#include "../ats.h"
unsigned long first_mfn;
u64 *table, *pde, *ntable;
u64 ntable_maddr, mask;
- struct hvm_iommu *hd = domain_hvm_iommu(d);
+ struct domain_iommu *hd = dom_iommu(d);
bool_t ok = 0;
ASSERT( spin_is_locked(&hd->arch.mapping_lock) && pt_mfn );
u64 *table, *pde, *ntable;
u64 ntable_mfn;
unsigned long first_mfn;
- struct hvm_iommu *hd = domain_hvm_iommu(d);
+ struct domain_iommu *hd = dom_iommu(d);
ASSERT( spin_is_locked(&hd->arch.mapping_lock) && pt_mfn );
unsigned long next_table_mfn;
unsigned int level;
struct page_info *table;
- struct hvm_iommu *hd = domain_hvm_iommu(d);
+ const struct domain_iommu *hd = dom_iommu(d);
table = hd->arch.root_table;
level = hd->arch.paging_mode;
struct page_info *old_root = NULL;
void *new_root_vaddr;
unsigned long old_root_mfn;
- struct hvm_iommu *hd = domain_hvm_iommu(d);
+ struct domain_iommu *hd = dom_iommu(d);
level = hd->arch.paging_mode;
old_root = hd->arch.root_table;
unsigned int flags)
{
bool_t need_flush = 0;
- struct hvm_iommu *hd = domain_hvm_iommu(d);
+ struct domain_iommu *hd = dom_iommu(d);
unsigned long pt_mfn[7];
unsigned int merge_level;
int amd_iommu_unmap_page(struct domain *d, unsigned long gfn)
{
unsigned long pt_mfn[7];
- struct hvm_iommu *hd = domain_hvm_iommu(d);
+ struct domain_iommu *hd = dom_iommu(d);
BUG_ON( !hd->arch.root_table );
/* Share p2m table with iommu. */
void amd_iommu_share_p2m(struct domain *d)
{
- struct hvm_iommu *hd = domain_hvm_iommu(d);
+ struct domain_iommu *hd = dom_iommu(d);
struct page_info *p2m_table;
mfn_t pgd_mfn;
#include <xen/pci_regs.h>
#include <xen/paging.h>
#include <xen/softirq.h>
-#include <asm/hvm/iommu.h>
#include <asm/amd-iommu.h>
#include <asm/hvm/svm/amd-iommu-proto.h>
#include "../ats.h"
int req_id, valid = 1;
int dte_i = 0;
u8 bus = pdev->bus;
-
- struct hvm_iommu *hd = domain_hvm_iommu(domain);
+ const struct domain_iommu *hd = dom_iommu(domain);
BUG_ON( !hd->arch.root_table || !hd->arch.paging_mode ||
!iommu->dev_table.buffer );
return scan_pci_devices();
}
-static int allocate_domain_resources(struct hvm_iommu *hd)
+static int allocate_domain_resources(struct domain_iommu *hd)
{
/* allocate root table */
spin_lock(&hd->arch.mapping_lock);
static int amd_iommu_domain_init(struct domain *d)
{
- struct hvm_iommu *hd = domain_hvm_iommu(d);
+ struct domain_iommu *hd = dom_iommu(d);
/* allocate page directroy */
if ( allocate_domain_resources(hd) != 0 )
AMD_IOMMU_DEBUG("Disable: device id = %#x, "
"domain = %d, paging mode = %d\n",
req_id, domain->domain_id,
- domain_hvm_iommu(domain)->arch.paging_mode);
+ dom_iommu(domain)->arch.paging_mode);
}
spin_unlock_irqrestore(&iommu->lock, flags);
{
struct amd_iommu *iommu;
int bdf;
- struct hvm_iommu *t = domain_hvm_iommu(target);
+ struct domain_iommu *t = dom_iommu(target);
bdf = PCI_BDF2(pdev->bus, pdev->devfn);
iommu = find_iommu_for_device(pdev->seg, bdf);
static void deallocate_iommu_page_tables(struct domain *d)
{
- struct hvm_iommu *hd = domain_hvm_iommu(d);
+ struct domain_iommu *hd = dom_iommu(d);
if ( iommu_use_hap_pt(d) )
return;
static void amd_dump_p2m_table(struct domain *d)
{
- struct hvm_iommu *hd = domain_hvm_iommu(d);
+ const struct domain_iommu *hd = dom_iommu(d);
if ( !hd->arch.root_table )
return;
static void arm_smmu_iotlb_flush_all(struct domain *d)
{
- struct arm_smmu_domain *smmu_domain = domain_hvm_iommu(d)->arch.priv;
+ struct arm_smmu_domain *smmu_domain = dom_iommu(d)->arch.priv;
struct arm_smmu_domain_cfg *cfg;
spin_lock(&smmu_domain->lock);
unsigned int irq;
int ret, start;
struct arm_smmu_domain_cfg *cfg;
- struct arm_smmu_domain *smmu_domain = domain_hvm_iommu(d)->arch.priv;
+ struct arm_smmu_domain *smmu_domain = dom_iommu(d)->arch.priv;
ASSERT(spin_is_locked(&smmu_domain->lock));
static void arm_smmu_destroy_domain_context(struct arm_smmu_domain_cfg *cfg)
{
struct domain *d = cfg->domain;
- struct arm_smmu_domain *smmu_domain = domain_hvm_iommu(d)->arch.priv;
+ struct arm_smmu_domain *smmu_domain = dom_iommu(d)->arch.priv;
struct arm_smmu_device *smmu = cfg->smmu;
void __iomem *cb_base;
unsigned int irq;
{
struct arm_smmu_device *smmu = arm_smmu_find_smmu_by_dev(dev);
struct arm_smmu_master *master;
- struct arm_smmu_domain *smmu_domain = domain_hvm_iommu(d)->arch.priv;
+ struct arm_smmu_domain *smmu_domain = dom_iommu(d)->arch.priv;
struct arm_smmu_domain_cfg *cfg = NULL;
struct arm_smmu_domain_cfg *curr;
int ret;
static int arm_smmu_detach_dev(struct domain *d,
const struct dt_device_node *dev)
{
- struct arm_smmu_domain *smmu_domain = domain_hvm_iommu(d)->arch.priv;
+ struct arm_smmu_domain *smmu_domain = dom_iommu(d)->arch.priv;
struct arm_smmu_master *master;
struct arm_smmu_device *smmu = arm_smmu_find_smmu_by_dev(dev);
struct arm_smmu_domain_cfg *cfg;
spin_lock_init(&smmu_domain->lock);
INIT_LIST_HEAD(&smmu_domain->contexts);
- domain_hvm_iommu(d)->arch.priv = smmu_domain;
+ dom_iommu(d)->arch.priv = smmu_domain;
return 0;
}
static void arm_smmu_iommu_domain_teardown(struct domain *d)
{
- struct arm_smmu_domain *smmu_domain = domain_hvm_iommu(d)->arch.priv;
+ struct arm_smmu_domain *smmu_domain = dom_iommu(d)->arch.priv;
ASSERT(list_empty(&smmu_domain->contexts));
xfree(smmu_domain);
int iommu_assign_dt_device(struct domain *d, struct dt_device_node *dev)
{
int rc = -EBUSY;
- struct hvm_iommu *hd = domain_hvm_iommu(d);
+ struct domain_iommu *hd = dom_iommu(d);
if ( !iommu_enabled || !hd->platform_ops )
return -EINVAL;
int iommu_deassign_dt_device(struct domain *d, struct dt_device_node *dev)
{
- struct hvm_iommu *hd = domain_hvm_iommu(d);
+ const struct domain_iommu *hd = dom_iommu(d);
int rc;
if ( !iommu_enabled || !hd->platform_ops )
list_del(&dev->domain_list);
dt_device_set_used_by(dev, hardware_domain->domain_id);
- list_add(&dev->domain_list, &domain_hvm_iommu(hardware_domain)->dt_devices);
+ list_add(&dev->domain_list, &dom_iommu(hardware_domain)->dt_devices);
fail:
spin_unlock(&dtdevs_lock);
int iommu_dt_domain_init(struct domain *d)
{
- struct hvm_iommu *hd = domain_hvm_iommu(d);
-
- INIT_LIST_HEAD(&hd->dt_devices);
+ INIT_LIST_HEAD(&dom_iommu(d)->dt_devices);
return 0;
}
void iommu_dt_domain_destroy(struct domain *d)
{
- struct hvm_iommu *hd = domain_hvm_iommu(d);
+ const struct domain_iommu *hd = dom_iommu(d);
struct dt_device_node *dev, *_dev;
int rc;
#include <xen/iommu.h>
#include <xen/irq.h>
#include <asm/hvm/irq.h>
-#include <asm/hvm/iommu.h>
#include <asm/hvm/support.h>
#include <xen/hvm/irq.h>
#include <xen/tasklet.h>
#include <xen/sched.h>
#include <xen/iommu.h>
-#include <asm/hvm/iommu.h>
#include <xen/paging.h>
#include <xen/guest_access.h>
#include <xen/event.h>
int iommu_domain_init(struct domain *d)
{
- struct hvm_iommu *hd = domain_hvm_iommu(d);
+ struct domain_iommu *hd = dom_iommu(d);
int ret = 0;
ret = arch_iommu_domain_init(d);
void __hwdom_init iommu_hwdom_init(struct domain *d)
{
- struct hvm_iommu *hd = domain_hvm_iommu(d);
+ const struct domain_iommu *hd = dom_iommu(d);
check_hwdom_reqs(d);
void iommu_teardown(struct domain *d)
{
- const struct hvm_iommu *hd = domain_hvm_iommu(d);
+ const struct domain_iommu *hd = dom_iommu(d);
d->need_iommu = 0;
hd->platform_ops->teardown(d);
void iommu_domain_destroy(struct domain *d)
{
- struct hvm_iommu *hd = domain_hvm_iommu(d);
-
- if ( !iommu_enabled || !hd->platform_ops )
+ if ( !iommu_enabled || !dom_iommu(d)->platform_ops )
return;
if ( need_iommu(d) )
int iommu_map_page(struct domain *d, unsigned long gfn, unsigned long mfn,
unsigned int flags)
{
- struct hvm_iommu *hd = domain_hvm_iommu(d);
+ const struct domain_iommu *hd = dom_iommu(d);
if ( !iommu_enabled || !hd->platform_ops )
return 0;
int iommu_unmap_page(struct domain *d, unsigned long gfn)
{
- struct hvm_iommu *hd = domain_hvm_iommu(d);
+ const struct domain_iommu *hd = dom_iommu(d);
if ( !iommu_enabled || !hd->platform_ops )
return 0;
void iommu_iotlb_flush(struct domain *d, unsigned long gfn, unsigned int page_count)
{
- struct hvm_iommu *hd = domain_hvm_iommu(d);
+ const struct domain_iommu *hd = dom_iommu(d);
if ( !iommu_enabled || !hd->platform_ops || !hd->platform_ops->iotlb_flush )
return;
void iommu_iotlb_flush_all(struct domain *d)
{
- struct hvm_iommu *hd = domain_hvm_iommu(d);
+ const struct domain_iommu *hd = dom_iommu(d);
if ( !iommu_enabled || !hd->platform_ops || !hd->platform_ops->iotlb_flush_all )
return;
bool_t iommu_has_feature(struct domain *d, enum iommu_feature feature)
{
- const struct hvm_iommu *hd = domain_hvm_iommu(d);
-
if ( !iommu_enabled )
return 0;
- return test_bit(feature, hd->features);
+ return test_bit(feature, dom_iommu(d)->features);
}
static void iommu_dump_p2m_table(unsigned char key)
#include <xen/prefetch.h>
#include <xen/iommu.h>
#include <xen/irq.h>
-#include <asm/hvm/iommu.h>
#include <asm/hvm/irq.h>
#include <xen/delay.h>
#include <xen/keyhandler.h>
int iommu_add_device(struct pci_dev *pdev)
{
- struct hvm_iommu *hd;
+ const struct domain_iommu *hd;
int rc;
u8 devfn;
ASSERT(spin_is_locked(&pcidevs_lock));
- hd = domain_hvm_iommu(pdev->domain);
+ hd = dom_iommu(pdev->domain);
if ( !iommu_enabled || !hd->platform_ops )
return 0;
int iommu_enable_device(struct pci_dev *pdev)
{
- struct hvm_iommu *hd;
+ const struct domain_iommu *hd;
if ( !pdev->domain )
return -EINVAL;
ASSERT(spin_is_locked(&pcidevs_lock));
- hd = domain_hvm_iommu(pdev->domain);
+ hd = dom_iommu(pdev->domain);
if ( !iommu_enabled || !hd->platform_ops ||
!hd->platform_ops->enable_device )
return 0;
int iommu_remove_device(struct pci_dev *pdev)
{
- struct hvm_iommu *hd;
+ const struct domain_iommu *hd;
u8 devfn;
if ( !pdev->domain )
return -EINVAL;
- hd = domain_hvm_iommu(pdev->domain);
+ hd = dom_iommu(pdev->domain);
if ( !iommu_enabled || !hd->platform_ops )
return 0;
static int assign_device(struct domain *d, u16 seg, u8 bus, u8 devfn)
{
- struct hvm_iommu *hd = domain_hvm_iommu(d);
+ const struct domain_iommu *hd = dom_iommu(d);
struct pci_dev *pdev;
int rc = 0;
/* caller should hold the pcidevs_lock */
int deassign_device(struct domain *d, u16 seg, u8 bus, u8 devfn)
{
- struct hvm_iommu *hd = domain_hvm_iommu(d);
+ const struct domain_iommu *hd = dom_iommu(d);
struct pci_dev *pdev = NULL;
int ret = 0;
struct domain *d, u16 seg, u8 bus, u8 devfn,
XEN_GUEST_HANDLE_64(uint32) buf, int max_sdevs)
{
- struct hvm_iommu *hd = domain_hvm_iommu(d);
+ const struct domain_iommu *hd = dom_iommu(d);
struct pci_dev *pdev;
int group_id, sdev_id;
u32 bdf;
#include <xen/irq.h>
#include <xen/sched.h>
#include <xen/iommu.h>
-#include <asm/hvm/iommu.h>
#include <xen/time.h>
#include <xen/list.h>
#include <xen/pci.h>
#include <xen/domain_page.h>
#include <xen/iocap.h>
#include <xen/iommu.h>
-#include <asm/hvm/iommu.h>
#include <xen/numa.h>
#include <xen/softirq.h>
#include <xen/time.h>
{
struct acpi_drhd_unit *drhd;
struct pci_dev *pdev;
- struct hvm_iommu *hd = domain_hvm_iommu(domain);
+ struct domain_iommu *hd = dom_iommu(domain);
int addr_width = agaw_to_width(hd->arch.agaw);
struct dma_pte *parent, *pte = NULL;
int level = agaw_to_level(hd->arch.agaw);
static void __intel_iommu_iotlb_flush(struct domain *d, unsigned long gfn,
int dma_old_pte_present, unsigned int page_count)
{
- struct hvm_iommu *hd = domain_hvm_iommu(d);
+ struct domain_iommu *hd = dom_iommu(d);
struct acpi_drhd_unit *drhd;
struct iommu *iommu;
int flush_dev_iotlb;
/* clear one page's page table */
static void dma_pte_clear_one(struct domain *domain, u64 addr)
{
- struct hvm_iommu *hd = domain_hvm_iommu(domain);
+ struct domain_iommu *hd = dom_iommu(domain);
struct dma_pte *page = NULL, *pte = NULL;
u64 pg_maddr;
static int intel_iommu_domain_init(struct domain *d)
{
- struct hvm_iommu *hd = domain_hvm_iommu(d);
-
- hd->arch.agaw = width_to_agaw(DEFAULT_DOMAIN_ADDRESS_WIDTH);
+ dom_iommu(d)->arch.agaw = width_to_agaw(DEFAULT_DOMAIN_ADDRESS_WIDTH);
return 0;
}
struct iommu *iommu,
u8 bus, u8 devfn, const struct pci_dev *pdev)
{
- struct hvm_iommu *hd = domain_hvm_iommu(domain);
+ struct domain_iommu *hd = dom_iommu(domain);
struct context_entry *context, *context_entries;
u64 maddr, pgd_maddr;
u16 seg = iommu->intel->drhd->segment;
if ( found == 0 )
{
- struct hvm_iommu *hd = domain_hvm_iommu(domain);
int iommu_domid;
- clear_bit(iommu->index, &hd->arch.iommu_bitmap);
+ clear_bit(iommu->index, &dom_iommu(domain)->arch.iommu_bitmap);
iommu_domid = domain_iommu_domid(domain, iommu);
if ( iommu_domid == -1 )
static void iommu_domain_teardown(struct domain *d)
{
- struct hvm_iommu *hd = domain_hvm_iommu(d);
+ struct domain_iommu *hd = dom_iommu(d);
struct mapped_rmrr *mrmrr, *tmp;
if ( list_empty(&acpi_drhd_units) )
struct domain *d, unsigned long gfn, unsigned long mfn,
unsigned int flags)
{
- struct hvm_iommu *hd = domain_hvm_iommu(d);
+ struct domain_iommu *hd = dom_iommu(d);
struct dma_pte *page = NULL, *pte = NULL, old, new = { 0 };
u64 pg_maddr;
{
struct acpi_drhd_unit *drhd;
struct iommu *iommu = NULL;
- struct hvm_iommu *hd = domain_hvm_iommu(d);
+ struct domain_iommu *hd = dom_iommu(d);
int flush_dev_iotlb;
int iommu_domid;
*/
static void iommu_set_pgd(struct domain *d)
{
- struct hvm_iommu *hd = domain_hvm_iommu(d);
mfn_t pgd_mfn;
ASSERT( is_hvm_domain(d) && d->arch.hvm_domain.hap_enabled );
return;
pgd_mfn = pagetable_get_mfn(p2m_get_pagetable(p2m_get_hostp2m(d)));
- hd->arch.pgd_maddr = pagetable_get_paddr(pagetable_from_mfn(pgd_mfn));
+ dom_iommu(d)->arch.pgd_maddr =
+ pagetable_get_paddr(pagetable_from_mfn(pgd_mfn));
}
static int rmrr_identity_mapping(struct domain *d, bool_t map,
unsigned long base_pfn = rmrr->base_address >> PAGE_SHIFT_4K;
unsigned long end_pfn = PAGE_ALIGN_4K(rmrr->end_address) >> PAGE_SHIFT_4K;
struct mapped_rmrr *mrmrr;
- struct hvm_iommu *hd = domain_hvm_iommu(d);
+ struct domain_iommu *hd = dom_iommu(d);
ASSERT(spin_is_locked(&pcidevs_lock));
ASSERT(rmrr->base_address < rmrr->end_address);
static void vtd_dump_p2m_table(struct domain *d)
{
- struct hvm_iommu *hd;
+ const struct domain_iommu *hd;
if ( list_empty(&acpi_drhd_units) )
return;
- hd = domain_hvm_iommu(d);
+ hd = dom_iommu(d);
printk("p2m table has %d levels\n", agaw_to_level(hd->arch.agaw));
vtd_dump_p2m_table_level(hd->arch.pgd_maddr, agaw_to_level(hd->arch.agaw), 0, 0);
}
#include <xen/xmalloc.h>
#include <xen/domain_page.h>
#include <xen/iommu.h>
-#include <asm/hvm/iommu.h>
#include <xen/numa.h>
#include <xen/softirq.h>
#include <xen/time.h>
int arch_iommu_populate_page_table(struct domain *d)
{
- struct hvm_iommu *hd = domain_hvm_iommu(d);
+ const struct domain_iommu *hd = dom_iommu(d);
struct page_info *page;
int rc = 0, n = 0;
int arch_iommu_domain_init(struct domain *d)
{
- struct hvm_iommu *hd = domain_hvm_iommu(d);
+ struct domain_iommu *hd = dom_iommu(d);
spin_lock_init(&hd->arch.mapping_lock);
INIT_LIST_HEAD(&hd->arch.g2m_ioport_list);
void arch_iommu_domain_destroy(struct domain *d)
{
- struct hvm_iommu *hd = domain_hvm_iommu(d);
+ const struct domain_iommu *hd = dom_iommu(d);
struct list_head *ioport_list, *tmp;
struct g2m_ioport *ioport;
#include <asm/gic.h>
#include <public/hvm/params.h>
#include <xen/serial.h>
-#include <xen/hvm/iommu.h>
struct hvm_domain
{
uint64_t params[HVM_NR_PARAMS];
- struct hvm_iommu iommu;
} __cacheline_aligned;
#ifdef CONFIG_ARM_64
+++ /dev/null
-#ifndef __ASM_ARM_HVM_IOMMU_H_
-#define __ASM_ARM_HVM_IOMMU_H_
-
-struct arch_hvm_iommu
-{
- /* Private information for the IOMMU drivers */
- void *priv;
-};
-
-#endif /* __ASM_ARM_HVM_IOMMU_H_ */
#ifndef __ARCH_ARM_IOMMU_H__
#define __ARCH_ARM_IOMMU_H__
+struct arch_iommu
+{
+ /* Private information for the IOMMU drivers */
+ void *priv;
+};
+
/* Always share P2M Table between the CPU and the IOMMU */
#define iommu_use_hap_pt(d) (1)
-#define domain_hvm_iommu(d) (&d->arch.hvm_domain.iommu)
const struct iommu_ops *iommu_get_ops(void);
void __init iommu_set_ops(const struct iommu_ops *ops);
#include <asm/hvm/vlapic.h>
#include <asm/hvm/vioapic.h>
#include <asm/hvm/io.h>
-#include <xen/hvm/iommu.h>
#include <asm/hvm/viridian.h>
#include <asm/hvm/vmx/vmcs.h>
#include <asm/hvm/svm/vmcb.h>
spinlock_t uc_lock;
bool_t is_in_uc_mode;
- /* Pass-through */
- struct hvm_iommu hvm_iommu;
-
/* hypervisor intercepted msix table */
struct list_head msixtbl_list;
spinlock_t msixtbl_list_lock;
unsigned int np;
};
-struct arch_hvm_iommu
+struct arch_iommu
{
u64 pgd_maddr; /* io page directory machine address */
spinlock_t mapping_lock; /* io page table lock */
#ifndef __ARCH_X86_IOMMU_H__
#define __ARCH_X86_IOMMU_H__
+#include <asm/hvm/iommu.h> /* For now - should really be merged here. */
+
#define MAX_IOMMUS 32
/* Does this domain have a P2M table we can use as its IOMMU pagetable? */
#define iommu_use_hap_pt(d) (hap_enabled(d) && iommu_hap_pt_share)
-#define domain_hvm_iommu(d) (&d->arch.hvm_domain.hvm_iommu)
void iommu_update_ire_from_apic(unsigned int apic, unsigned int reg, unsigned int value);
unsigned int iommu_read_apic_from_ire(unsigned int apic, unsigned int reg);
+++ /dev/null
-/*
- * Copyright (c) 2006, Intel Corporation.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
- * Place - Suite 330, Boston, MA 02111-1307 USA.
- *
- * Copyright (C) Allen Kay <allen.m.kay@intel.com>
- */
-
-#ifndef __XEN_HVM_IOMMU_H__
-#define __XEN_HVM_IOMMU_H__
-
-#include <xen/iommu.h>
-#include <xen/list.h>
-#include <asm/hvm/iommu.h>
-
-struct hvm_iommu {
- struct arch_hvm_iommu arch;
-
- /* iommu_ops */
- const struct iommu_ops *platform_ops;
-
-#ifdef HAS_DEVICE_TREE
- /* List of DT devices assigned to this domain */
- struct list_head dt_devices;
-#endif
-
- /* Features supported by the IOMMU */
- DECLARE_BITMAP(features, IOMMU_FEAT_count);
-};
-
-#define iommu_set_feature(d, f) set_bit((f), domain_hvm_iommu(d)->features)
-#define iommu_clear_feature(d, f) clear_bit((f), domain_hvm_iommu(d)->features)
-
-#endif /* __XEN_HVM_IOMMU_H__ */
bool_t iommu_has_feature(struct domain *d, enum iommu_feature feature);
+struct domain_iommu {
+ struct arch_iommu arch;
+
+ /* iommu_ops */
+ const struct iommu_ops *platform_ops;
+
+#ifdef HAS_DEVICE_TREE
+ /* List of DT devices assigned to this domain */
+ struct list_head dt_devices;
+#endif
+
+ /* Features supported by the IOMMU */
+ DECLARE_BITMAP(features, IOMMU_FEAT_count);
+};
+
+#define dom_iommu(d) (&(d)->iommu)
+#define iommu_set_feature(d, f) set_bit(f, dom_iommu(d)->features)
+#define iommu_clear_feature(d, f) clear_bit(f, dom_iommu(d)->features)
#ifdef HAS_PCI
void pt_pci_init(void);
#include <xen/timer.h>
#include <xen/rangeset.h>
#include <xen/domain.h>
+#include <xen/iommu.h>
#include <xen/rcupdate.h>
#include <xen/cpumask.h>
#include <xen/nodemask.h>
enum guest_type guest_type;
#ifdef HAS_PASSTHROUGH
+ struct domain_iommu iommu;
+
/* Does this guest need iommu mappings (-1 meaning "being set up")? */
s8 need_iommu;
#endif